Publications
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Sudharshan Srinivasan, A. Khanda, Et al. \A Distributed Algorithm for Identifying Strongly Connected Components on Incremental Graphs," IEEE 35th Int'l Symposium on Computer Architecture and High-Performance Computing (SBAC-PAD), 2023.
Dhanasekar Sundararaman and Sudharshan Srinivasan. "Twigraph: Discovering and Visualizing Influential Words Between Twitter Profiles." International Conference on Social Informatics. Springer, 2017.
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[Bib]
Samuel D. Pollard, Sudharshan Srinivasan, and Boyana Norris. A performance and recommendation system for parallel graph processing implementations: Work-in-progress. In The 10th ACM/SPEC International Conference on Performance Engineering Companion, Mumbai, India, April 2019. ACM.
Sudharshan Srinivasan and Boyana Norris. "A Tiered GNN Architectuee for Improved Training of Multi-Agent Reinforcement Learning Systems" (under submission) IEEE RLC 2025.
Sudharshan Srinivasan and Boyana Norris. "Thinking Asynchronously for GNN communications on multi-node systems" (under submission) CYBI 2025.
Research
Machine learning systems and GNN infrastructure
This project focuses on designing high-performance computing (HPC) infrastructure and developing a parallel Graph Neural Network (GNN) architecture to efficiently scale and execute scientific GNN workloads. The goal is to enable seamless scalability and optimize performance for demanding computational tasks in scientific domains such as population genetics and Multi-agent reinforcement learning(MARL) environments.
Framework for recommending parallel graph processing packages
Developed a framework that predicts execution time of parallel graph processing packages for specific graphs under given hardware configurations by analyzing metadata of the graph using Machine learning models. The model was able to achieve an accuracy of 97%. This framework is added as a part of the easy-parallel-graph system developed by Sam Pollard, which is available here
Ranking for sparse linear solvers
Developed a ranking framework that suggests the best performing solver for a specific sparse linear system. On an average, a speedup of 7.5 was achieved by picking the solver suggested by the framework rather than the default solver offered by PETSc while max speedups are up to 800 times better than the default.
Application aware Heterogeneous Many-Core Processors
Implemented a design for Heterogeneous Many-Core Processors(HMCP) that are fine tuned and customized for specific applications by statically analyzing its underlying complexities in order to optimize power, performance and area consumed by the HMCP.
Computational model of an analytical Simulator
A full scale analytical simulator is designed to give a proof of concept for the proposed Parallel Architecture for application aware HMCP using C++ and Python. The Simulator is tested with workloads generated from SPEC 2000 and LINPACK 1000 Benchmark suite.