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DisassemblerX86.C
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1 #include "sage3basic.h"
2 
3 // DQ (10/14/2010): This should only be included by source files that require it.
4 // This fixed a reported bug which caused conflicts with autoconf macros (e.g. PACKAGE_BUGREPORT).
5 // Interestingly it must be at the top of the list of include files.
6 #include "rose_config.h"
7 
8 #include "Assembler.h"
9 #include "AssemblerX86.h"
10 #include "AsmUnparser_compat.h"
11 #include "Disassembler.h"
12 #include "sageBuilderAsm.h"
13 #include "DisassemblerX86.h"
14 #include "integerOps.h"
15 
16 #include <sstream>
17 
18 
19 /* See header file for full documentation. */
20 
21 // These are macros to make them look like constants while they are really function calls
22 #define BYTET (SgAsmTypeByte::createType())
23 #define WORDT (SgAsmTypeWord::createType())
24 #define DWORDT (SgAsmTypeDoubleWord::createType())
25 #define QWORDT (SgAsmTypeQuadWord::createType())
26 #define DQWORDT (SgAsmTypeDoubleQuadWord::createType())
27 #define FLOATT (SgAsmTypeSingleFloat::createType())
28 #define DOUBLET (SgAsmTypeDoubleFloat::createType())
29 #define LDOUBLET (SgAsmType80bitFloat::createType())
30 #define V8BYTET (SgAsmTypeVector::createType(8, BYTET))
31 #define V16BYTET (SgAsmTypeVector::createType(16, BYTET))
32 #define V4WORDT (SgAsmTypeVector::createType(4, WORDT))
33 #define V8WORDT (SgAsmTypeVector::createType(8, WORDT))
34 #define V2DWORDT (SgAsmTypeVector::createType(2, DWORDT))
35 #define V4DWORDT (SgAsmTypeVector::createType(4, DWORDT))
36 #define V2FLOATT (SgAsmTypeVector::createType(2, FLOATT))
37 #define V4FLOATT (SgAsmTypeVector::createType(4, FLOATT))
38 #define V2QWORDT (SgAsmTypeVector::createType(2, QWORDT))
39 #define V2DOUBLET (SgAsmTypeVector::createType(2, DOUBLET))
40 
41 /*========================================================================================================================
42  * DisassemblerX86 primary methods, mostly defined by the superclass.
43  *========================================================================================================================*/
44 
45 bool
46 DisassemblerX86::can_disassemble(SgAsmGenericHeader *header) const
47 {
48  SgAsmExecutableFileFormat::InsSetArchitecture isa = header->get_isa();
49  if (isSgAsmDOSFileHeader(header))
50  return 2==get_wordsize();
51  if ((isa & SgAsmExecutableFileFormat::ISA_FAMILY_MASK) == SgAsmExecutableFileFormat::ISA_IA32_Family)
52  return 4==get_wordsize();
53  if ((isa & SgAsmExecutableFileFormat::ISA_FAMILY_MASK) == SgAsmExecutableFileFormat::ISA_X8664_Family)
54  return 8==get_wordsize();
55  return false;
56 }
57 
58 void
59 DisassemblerX86::init(size_t wordsize)
60 {
61  /* The default register dictionary. If a register dictionary is specified in an SgAsmInterpretation, then that one will be
62  * used instead of the default we set here. */
63  switch (wordsize) {
64  case 2: insnSize = x86_insnsize_16; set_registers(RegisterDictionary::dictionary_i286()); break;
65  case 4: insnSize = x86_insnsize_32; set_registers(RegisterDictionary::dictionary_pentium4()); break;
66  case 8: insnSize = x86_insnsize_64; set_registers(RegisterDictionary::dictionary_amd64()); break;
67  default: ROSE_ASSERT(!"unknown x86 instruction size");
68  }
69  set_wordsize(wordsize);
70  set_alignment(1);
71  set_sex(ByteOrder::ORDER_LSB);
72  ROSE_ASSERT(get_registers()!=NULL);
73 
74  /* Not actually necessary because we'll call it before each instruction. We call it here just to initialize all the data
75  * members to reasonable values for debugging. */
76  startInstruction(0, NULL, 0);
77 }
78 
79 SgAsmInstruction *
80 DisassemblerX86::disassembleOne(const MemoryMap *map, rose_addr_t start_va, AddressSet *successors)
81 {
82  /* The low-level disassembly function don't understand MemoryMap mappings. Therefore, remap the next few bytes (enough
83  * for at least one instruction) into a temporary buffer. The longest x86 instruction is 15 bytes in 16-bit mode and 13
84  * bytes in 32-bit mode:
85  *
86  * [16-bit]: 66 67 F0 3E 81 04 4E 01234567 89ABCDEF: add [ds:esi+ecx*2+0x67452301], 0xEFCDAB89
87  * [32-bit]: F0 3E 81 04 4E 01234567 89ABCDEF: add [ds:esi+ecx*2+0x67452301], 0xEFCDAB89
88  *
89  * In theory, by adding all appropriate prefix bytes you can obtain an instruction that is up to 16 bytes long. However,
90  * the x86 CPU will generate an exception if the instruction length exceeds 15 bytes, and so will the getByte method. */
91  unsigned char temp[16];
92  size_t tempsz = map->read(temp, start_va, sizeof temp, get_protection());
93 
94  /* Disassemble the instruction */
95  startInstruction(start_va, temp, tempsz);
96  SgAsmx86Instruction *insn = disassemble(); /*throws an exception on error*/
97  ROSE_ASSERT(insn);
98 
99  /* Note successors if necesssary */
100  if (successors) {
101  bool complete;
102  AddressSet suc2 = insn->get_successors(&complete);
103  successors->insert(suc2.begin(), suc2.end());
104  }
105 
106  update_progress(insn);
107  return insn;
108 }
109 
110 SgAsmInstruction *
111 DisassemblerX86::make_unknown_instruction(const Exception &e)
112 {
113  SgAsmx86Instruction *insn = makeInstruction(x86_unknown_instruction, "unknown");
114  insn->set_raw_bytes(e.bytes);
115  return insn;
116 }
117 
118 /*========================================================================================================================
119  * Methods for reading bytes of the instruction. These keep track of how much has been read, which in turn is used by
120  * the makeInstruction method.
121  *========================================================================================================================*/
122 
123 uint8_t
124 DisassemblerX86::getByte()
125 {
126  if (insnbufat>=15)
127  throw ExceptionX86("instruction longer than 15 bytes", this);
128  if (insnbufat>=insnbuf.size())
129  throw ExceptionX86("short read", this);
130  return insnbuf[insnbufat++];
131 }
132 
133 uint16_t
134 DisassemblerX86::getWord()
135 {
136  uint16_t lo = getByte();
137  uint16_t hi = getByte();
138  return (hi<<8) | lo;
139 }
140 
141 uint32_t
142 DisassemblerX86::getDWord()
143 {
144  uint32_t lo = getWord();
145  uint32_t hi = getWord();
146  return (hi<<16) | lo;
147 }
148 
149 uint64_t
150 DisassemblerX86::getQWord()
151 {
152  uint64_t lo = getDWord();
153  uint64_t hi = getDWord();
154  return (hi<<32) | lo;
155 }
156 
157 
158 
159 
160 /*========================================================================================================================
161  * Miscellaneous helper methods
162  *========================================================================================================================*/
163 
164 SgAsmExpression *
165 DisassemblerX86::currentDataSegment() const {
166  if (segOverride != x86_segreg_none)
167  return makeSegmentRegister(segOverride, insnSize==x86_insnsize_64);
168  return makeSegmentRegister(x86_segreg_ds, insnSize==x86_insnsize_64);
169 }
170 
171 X86InstructionSize
172 DisassemblerX86::effectiveAddressSize() const
173 {
174  if (addressSizeOverride) {
175  switch (insnSize) {
176  case x86_insnsize_16: return x86_insnsize_32;
177  case x86_insnsize_32: return x86_insnsize_16;
178  case x86_insnsize_64: return x86_insnsize_32;
179  default: { ROSE_ASSERT(false); /* avoid MSCV warning by adding return stmt */ return insnSize; }
180  }
181  } else {
182  return insnSize;
183  }
184 }
185 
186 X86InstructionSize
187 DisassemblerX86::effectiveOperandSize() const
188 {
189  if (operandSizeOverride) {
190  switch (insnSize) {
191  case x86_insnsize_16:
192  return x86_insnsize_32;
193  case x86_insnsize_32:
194  return x86_insnsize_16;
195  case x86_insnsize_64: {
196  /* Some instructions (e.g., MOVD/MOVQ) have both the operandSizeOverride prefix (0x66) along with the REX.W
197  * bit. These instructions are inherently 32-bit and they use the REX.W bit to specify 64-bit operands. Also,
198  * for instructions that don't have 0x66 as part of the opcode but which are inherently 32-bit and use the
199  * REX.W bit to select 64-bit operands, the CPU seems to ignore extraneous 0x66 prefixes when REX.W is set. */
200  if (rexPresent && rexW)
201  return x86_insnsize_64;
202  return x86_insnsize_16;
203  }
204  default: { ROSE_ASSERT(false); /* avoid MSCV warning by adding return stmt */ return insnSize; }
205  }
206  } else {
207  X86InstructionSize s = insnSize;
208  if (insnSize == x86_insnsize_64 && !rexW && !sizeMustBe64Bit)
209  s = x86_insnsize_32;
210  return s;
211  /* FIXME: This doesn't handle all of the special cases */
212  }
213 }
214 
215 DisassemblerX86::MMPrefix
216 DisassemblerX86::mmPrefix() const
217 {
218  switch (repeatPrefix) {
219  case x86_repeat_none: {
220  if (operandSizeOverride) {
221  return mm66;
222  } else {
223  return mmNone;
224  }
225  }
226  case x86_repeat_repne: {
227  if (operandSizeOverride) {
228  throw ExceptionX86("bad combination of repeat prefix and operand size override", this);
229  } else {
230  return mmF2;
231  }
232  }
233  case x86_repeat_repe: {
234  if (operandSizeOverride) {
235  throw ExceptionX86("bad combination of repeat prefix and operand size override", this);
236  } else {
237  return mmF3;
238  }
239  }
240  default: { ROSE_ASSERT(false); /* avoid MSCV warning by adding return stmt */ return mmNone; }
241  }
242 }
243 
244 void
245 DisassemblerX86::setRex(uint8_t opcode)
246 {
247  rexPresent = true;
248  rexW = (opcode & 8) != 0;
249  rexR = (opcode & 4) != 0;
250  rexX = (opcode & 2) != 0;
251  rexB = (opcode & 1) != 0;
252 }
253 
254 DisassemblerX86::RegisterMode
255 DisassemblerX86::sizeToMode(X86InstructionSize s)
256 {
257  switch (s) {
258  case x86_insnsize_16: return rmWord;
259  case x86_insnsize_32: return rmDWord;
260  case x86_insnsize_64: return rmQWord;
261  default: { ROSE_ASSERT(false); /* avoid MSCV warning by adding return stmt */ return rmWord; }
262  }
263 }
264 
265 SgAsmType *
266 DisassemblerX86::sizeToType(X86InstructionSize s)
267 {
268  switch (s) {
269  case x86_insnsize_none: return NULL;
270  case x86_insnsize_16: return SgAsmTypeWord::createType();
271  case x86_insnsize_32: return SgAsmTypeDoubleWord::createType();
272  case x86_insnsize_64: return SgAsmTypeQuadWord::createType();
273  default: { abort(); /* avoid MSCV warning by adding return stmt */ return NULL; }
274  }
275 }
276 
277 
278 
279 
280 
281 /*========================================================================================================================
282  * Methods that construct something. (Their names all start with "make".)
283  *========================================================================================================================*/
284 
285 SgAsmExpression *
286 DisassemblerX86::makeAddrSizeValue(int64_t val, size_t bit_offset, size_t bit_size)
287 {
288  SgAsmValueExpression *retval = NULL;
289  switch (effectiveAddressSize()) {
290  case x86_insnsize_16:
291  retval = SageBuilderAsm::makeWordValue((uint16_t)val);
292  break;
293  case x86_insnsize_32:
294  retval = SageBuilderAsm::makeDWordValue((uint32_t)val);
295  break;
296  case x86_insnsize_64:
297  retval = SageBuilderAsm::makeQWordValue((uint64_t)val);
298  break;
299  default:
300  ROSE_ASSERT(false);
301  }
302  retval->set_bit_offset(bit_offset);
303  retval->set_bit_size(bit_size);
304  return retval;
305 }
306 
307 SgAsmx86Instruction *
308 DisassemblerX86::makeInstruction(X86InstructionKind kind, const std::string &mnemonic,
309  SgAsmExpression *op1, SgAsmExpression *op2, SgAsmExpression *op3, SgAsmExpression *op4)
310 {
311  SgAsmx86Instruction *insn = new SgAsmx86Instruction(ip, mnemonic, kind, insnSize, effectiveOperandSize(),
312  effectiveAddressSize());
313  ROSE_ASSERT(insn);
314  insn->set_lockPrefix(lock);
315  insn->set_repeatPrefix(repeatPrefix);
316  insn->set_raw_bytes(SgUnsignedCharList(&(insnbuf[0]), &(insnbuf[0])+insnbufat));
317  if (segOverride != x86_segreg_none)
318  insn->set_segmentOverride(segOverride);
319  if (branchPredictionEnabled)
320  insn->set_branchPrediction(branchPrediction);
321 
322  SgAsmOperandList *operands = new SgAsmOperandList();
323  insn->set_operandList(operands);
324  operands->set_parent(insn);
325 
326  /* If any operand is null, then the following operands must also be null because analysis assumes that the operand vector
327  * indices correspond to argument positions and don't expect null-padding in the vector. */
328  ROSE_ASSERT((!op1 && !op2 && !op3 && !op4) ||
329  ( op1 && !op2 && !op3 && !op4) ||
330  ( op1 && op2 && !op3 && !op4) ||
331  ( op1 && op2 && op3 && !op4) ||
332  ( op1 && op2 && op3 && op4));
333 
334  if (op1)
335  SageBuilderAsm::appendOperand(insn, op1);
336  if (op2)
337  SageBuilderAsm::appendOperand(insn, op2);
338  if (op3)
339  SageBuilderAsm::appendOperand(insn, op3);
340  if (op4)
341  SageBuilderAsm::appendOperand(insn, op4);
342 
343  return insn;
344 }
345 
346 SgAsmx86RegisterReferenceExpression *
347 DisassemblerX86::makeIP()
348 {
349  const char *name = NULL;
350  switch (insnSize) {
351  case x86_insnsize_16: name="ip"; break;
352  case x86_insnsize_32: name="eip"; break;
353  case x86_insnsize_64: name="rip"; break;
354  case x86_insnsize_none: ROSE_ASSERT(!"unknown instruction size");
355  }
356  ROSE_ASSERT(get_registers()!=NULL);
357  const RegisterDescriptor *rdesc = get_registers()->lookup(name);
358  ROSE_ASSERT(rdesc!=NULL);
359  SgAsmx86RegisterReferenceExpression *r = new SgAsmx86RegisterReferenceExpression(*rdesc);
360  r->set_type(sizeToType(insnSize));
361  return r;
362 }
363 
364 SgAsmx86RegisterReferenceExpression *
365 DisassemblerX86::makeOperandRegisterByte(bool rexExtension, uint8_t registerNumber)
366 {
367  return makeRegister((rexExtension ? 8 : 0) + registerNumber,
368  (rexPresent ? rmRexByte : rmLegacyByte));
369 }
370 
371 SgAsmx86RegisterReferenceExpression *
372 DisassemblerX86::makeOperandRegisterFull(bool rexExtension, uint8_t registerNumber)
373 {
374  return makeRegister((rexExtension ? 8 : 0) + registerNumber,
375  sizeToMode(insnSize));
376 }
377 
378 /* At one time this function created x86-specific register reference expressions (RREs) that had hard-coded values for register
379  * class, register number, and register position. These values had the same meanings across all x86 architectures and
380  * corresponded to various enums in ROSE.
381  *
382  * The new approach (added Oct 2010) replaces x86-specific values with a more generic RegisterDescriptor struct, where each
383  * register is described by a major number (formerly the register class), a minor number (formerly the register number), and a
384  * bit offset and size (formerly both represented by the register position). The idea is that a RegisterDescriptor does not
385  * need to contain machine-specific values. Therefore, we've added a level of indirection: makeRegister() converts
386  * machine-specific values to a register name, which is then looked up in a RegisterDictionary to return a
387  * RegisterDescriptor. The entries in the dictionary determine what registers are available to the disassembler.
388  *
389  * Currently (2010-10-05) the old class and numbers are used as the major and minor values but users should not assume that
390  * this is the case. They can assume that unrelated registers (e.g., "eax" vs "ebx") have descriptors that map to
391  * non-overlapping areas of the descriptor address space {major,minor,offset,size} while related registers (e.g., "eax" vs
392  * "ax") map to overlapping areas of the descriptor address space. */
393 SgAsmx86RegisterReferenceExpression *
394 DisassemblerX86::makeRegister(uint8_t fullRegisterNumber, RegisterMode m, SgAsmType *registerType) const
395 {
396  /* Register names for various RegisterMode, indexed by the fullRegisterNumber. The names and order of these names come from
397  * Intel documentation. */
398  static const char* regnames8l[16] = {
399  "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil", "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
400  };
401  static const char* regnames8h[4] = {
402  "ah", "ch", "dh", "bh"
403  };
404  static const char* regnames16[16] = {
405  "ax", "cx", "dx", "bx", "sp", "bp", "si", "di", "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
406  };
407  static const char* regnames32[16] = {
408  "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi", "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
409  };
410  static const char* regnames64[16] = {
411  "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi", "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
412  };
413  static const char* regnamesSeg[6] = {
414  "es", "cs", "ss", "ds", "fs", "gs"
415  };
416 
417  /* Obtain a register name. Also, override the registerType value for certain registers. */
418  std::string name;
419  switch (m) {
420  case rmLegacyByte:
421  if (fullRegisterNumber >= 8)
422  throw Exception("register number out of bounds");
423  if (fullRegisterNumber & 4) {
424  name = regnames8h[fullRegisterNumber % 4];
425  } else {
426  name = regnames8l[fullRegisterNumber % 4];
427  }
428  registerType = BYTET;
429  break;
430  case rmRexByte:
431  if (fullRegisterNumber >= 16)
432  throw Exception("register number out of bounds");
433  name = regnames8l[fullRegisterNumber];
434  registerType = BYTET;
435  break;
436  case rmWord:
437  if (fullRegisterNumber >= 16)
438  throw Exception("register number out of bounds");
439  name = regnames16[fullRegisterNumber];
440  registerType = WORDT;
441  break;
442  case rmDWord:
443  if (fullRegisterNumber >= 16)
444  throw Exception("register number out of bounds");
445  name = regnames32[fullRegisterNumber];
446  registerType = DWORDT;
447  break;
448  case rmQWord:
449  if (fullRegisterNumber >= 16)
450  throw Exception("register number out of bounds");
451  name = regnames64[fullRegisterNumber];
452  registerType = QWORDT;
453  break;
454  case rmSegment:
455  if (fullRegisterNumber >= 6)
456  throw Exception("register number out of bounds");
457  name = regnamesSeg[fullRegisterNumber];
458  registerType = WORDT;
459  break;
460  case rmST:
461  name = "st(" + StringUtility::numberToString(fullRegisterNumber) + ")";
462  registerType = LDOUBLET;
463  break;
464  case rmMM:
465  name = "mm" + StringUtility::numberToString(fullRegisterNumber);
466  break;
467  case rmXMM:
468  name = "xmm" + StringUtility::numberToString(fullRegisterNumber);
469  break;
470  case rmControl:
471  name = "cr" + StringUtility::numberToString(fullRegisterNumber);
472  break;
473  case rmDebug:
474  name = "dr" + StringUtility::numberToString(fullRegisterNumber);
475  break;
476  case rmReturnNull:
477  return NULL;
478  }
479  ROSE_ASSERT(!name.empty());
480 
481  /* Now that we have a register name, obtain the register descriptor from the dictionary. */
482  ROSE_ASSERT(get_registers()!=NULL);
483  const RegisterDescriptor *rdesc = get_registers()->lookup(name);
484  if (!rdesc)
485  throw Exception("register \"" + name + "\" is not available for " + get_registers()->get_architecture_name());
486 
487  /* Construct the return value. */
488  SgAsmx86RegisterReferenceExpression *rre = new SgAsmx86RegisterReferenceExpression(*rdesc);
489  ROSE_ASSERT(rre);
490  rre->set_type(registerType);
491  return rre;
492 }
493 
494 SgAsmExpression *
495 DisassemblerX86::makeSegmentRegister(X86SegmentRegister so, bool insn64) const
496 {
497  switch (so) {
498  case x86_segreg_none: ROSE_ASSERT(!"makeSegmentRegister does not support x86_segreg_none");
499  case x86_segreg_cs: return makeRegister(insn64 ? x86_segreg_ds : x86_segreg_cs, rmSegment);
500  case x86_segreg_ds: return makeRegister(x86_segreg_ds, rmSegment);
501  case x86_segreg_es: return makeRegister(insn64 ? x86_segreg_ds : x86_segreg_es, rmSegment);
502  case x86_segreg_fs: return makeRegister(x86_segreg_fs, rmSegment);
503  case x86_segreg_gs: return makeRegister(x86_segreg_gs, rmSegment);
504  case x86_segreg_ss: return makeRegister(insn64 ? x86_segreg_ds : x86_segreg_ss, rmSegment);
505  default: ROSE_ASSERT(!"Bad segment register in makeSegmentRegister");
506  }
507 
508  /* avoid MSCV warning by adding return stmt */
509  return NULL;
510 }
511 
512 
513 
514 
515 
516 /*========================================================================================================================
517  * Methods for operating on the ModR/M byte.
518  *========================================================================================================================*/
519 
520 void
521 DisassemblerX86::getModRegRM(RegisterMode regMode, RegisterMode rmMode, SgAsmType *t, SgAsmType *tForReg)
522 {
523  if (!tForReg)
524  tForReg = t;
525  modregrmByte = getByte();
526  modregrmByteSet = true;
527  modeField = modregrmByte >> 6;
528  regField = (modregrmByte & 070) >> 3;
529  rmField = modregrmByte & 7;
530  reg = makeModrmRegister(regMode, tForReg);
531  modrm = makeModrmNormal(rmMode, t);
532 }
533 
534 SgAsmMemoryReferenceExpression *
535 DisassemblerX86::decodeModrmMemory()
536 {
537  ROSE_ASSERT(modregrmByteSet);
538  SgAsmExpression* addressExpr = NULL;
539  X86SegmentRegister defaultSeg = x86_segreg_ds;
540  if (effectiveAddressSize() == x86_insnsize_16) {
541  if (modeField == 0 && rmField == 6) {
542  /* Special case */
543  size_t bit_offset = 8*insnbufat;
544  SgAsmValueExpression *ve = SageBuilderAsm::makeWordValue(getWord());
545  ve->set_bit_offset(bit_offset);
546  ve->set_bit_size(32);
547  addressExpr = ve;
548  } else {
549  switch (rmField) {
550  case 0:
551  defaultSeg = x86_segreg_ds;
552  addressExpr = SageBuilderAsm::makeAdd(makeRegister(3, rmWord), makeRegister(6, rmWord));
553  break;
554  case 1:
555  defaultSeg = x86_segreg_ds;
556  addressExpr = SageBuilderAsm::makeAdd(makeRegister(3, rmWord), makeRegister(7, rmWord));
557  break;
558  case 2:
559  defaultSeg = x86_segreg_ss;
560  addressExpr = SageBuilderAsm::makeAdd(makeRegister(5, rmWord), makeRegister(6, rmWord));
561  break;
562  case 3:
563  defaultSeg = x86_segreg_ss;
564  addressExpr = SageBuilderAsm::makeAdd(makeRegister(5, rmWord), makeRegister(7, rmWord));
565  break;
566  case 4:
567  defaultSeg = x86_segreg_ds;
568  addressExpr = makeRegister(6, rmWord);
569  break;
570  case 5:
571  defaultSeg = x86_segreg_ds;
572  addressExpr = makeRegister(7, rmWord);
573  break;
574  case 6:
575  defaultSeg = x86_segreg_ss;
576  addressExpr = makeRegister(5, rmWord);
577  break;
578  case 7:
579  defaultSeg = x86_segreg_ds;
580  addressExpr = makeRegister(3, rmWord);
581  break;
582  default: ROSE_ASSERT(false);
583  }
584  switch (modeField) {
585  case 0:
586  break; // No offset
587  case 1: {
588  size_t bit_offset = 8*insnbufat;
589  uint8_t offset = getByte();
590  SgAsmValueExpression *wv = SageBuilderAsm::makeWordValue((int16_t)(int8_t)offset);
591  wv->set_bit_offset(bit_offset);
592  wv->set_bit_size(8);
593  addressExpr = SageBuilderAsm::makeAdd(addressExpr, wv);
594  break;
595  }
596  case 2: {
597  size_t bit_offset = 8*insnbufat;
598  uint16_t offset = getWord();
599  SgAsmValueExpression *wv = SageBuilderAsm::makeWordValue(offset);
600  wv->set_bit_offset(bit_offset);
601  wv->set_bit_size(16);
602  addressExpr = SageBuilderAsm::makeAdd(addressExpr, wv);
603  break;
604  }
605  default:
606  ROSE_ASSERT(false);
607  }
608  }
609  } else {
610  /* 32 or 64 bits */
611  if (modeField == 0 && rmField == 5) {
612  /* Special case */
613  size_t bit_offset = 8*insnbufat;
614  uint32_t offset = getDWord();
615  addressExpr = makeAddrSizeValue(IntegerOps::signExtend<32, 64>((uint64_t)offset), bit_offset, 32);
616  if (insnSize == x86_insnsize_64) {
617  addressExpr = SageBuilderAsm::makeAdd(makeIP(), addressExpr);
618  }
619  } else {
620  if (rmField == 4) { /* Need SIB */
621  uint8_t sib = getByte();
622  uint8_t sibScaleField = sib >> 6;
623  uint8_t sibIndexField = (sib & 0070) >> 3;
624  uint8_t sibBaseField = sib & 7;
625  uint8_t actualScale = (1 << sibScaleField);
626  SgAsmExpression* sibBase = NULL;
627  if (sibBaseField == 5) {
628  switch (modeField) {
629  case 0: {
630  size_t bit_offset = 8*insnbufat;
631  uint32_t offset = getDWord();
632  sibBase = makeAddrSizeValue(IntegerOps::signExtend<32, 64>((uint64_t)offset), bit_offset, 32);
633  break;
634  }
635  case 1: {
636  sibBase = makeRegister((rexB ? 13 : 5), sizeToMode(insnSize));
637  defaultSeg = x86_segreg_ss;
638  break;
639  }
640  case 2: {
641  sibBase = makeRegister((rexB ? 13 : 5), sizeToMode(insnSize));
642  defaultSeg = x86_segreg_ss;
643  break;
644  }
645  default:
646  ROSE_ASSERT(false);
647  }
648  } else {
649  sibBase = makeOperandRegisterFull(rexB, sibBaseField);
650  if (sibBaseField == 4)
651  defaultSeg = x86_segreg_ss;
652  }
653  if (sibIndexField == 4 && !rexX) {
654  addressExpr = sibBase;
655  } else if (actualScale == 1) {
656  addressExpr = SageBuilderAsm::makeAdd(sibBase, makeOperandRegisterFull(rexX, sibIndexField));
657  } else {
658  addressExpr = SageBuilderAsm::makeAdd(sibBase,
659  SageBuilderAsm::makeMul(makeOperandRegisterFull(rexX, sibIndexField),
660  SageBuilderAsm::makeByteValue(actualScale)));
661  }
662  } else {
663  addressExpr = makeOperandRegisterFull(rexB, rmField);
664  if (rmField == 5)
665  defaultSeg = x86_segreg_ss;
666  }
667  switch (modeField) {
668  case 0:
669  break; /* No offset */
670  case 1: {
671  size_t bit_offset = 8*insnbufat;
672  uint8_t offset = getByte();
673  SgAsmIntegerValueExpression *offsetExpr = SageBuilderAsm::makeByteValue(offset);
674  offsetExpr->set_bit_offset(bit_offset);
675  offsetExpr->set_bit_size(8);
676  addressExpr = SageBuilderAsm::makeAdd(addressExpr, offsetExpr);
677  break;
678  }
679  case 2: {
680  size_t bit_offset = 8*insnbufat;
681  uint32_t offset = getDWord();
682  SgAsmIntegerValueExpression *offsetExpr = SageBuilderAsm::makeDWordValue(offset);
683  offsetExpr->set_bit_offset(bit_offset);
684  offsetExpr->set_bit_size(32);
685  addressExpr = SageBuilderAsm::makeAdd(addressExpr, offsetExpr);
686  break;
687  }
688  default:
689  ROSE_ASSERT(false);
690  }
691  }
692  }
693  ROSE_ASSERT(addressExpr);
694  X86SegmentRegister seg;
695  if (segOverride != x86_segreg_none) {
696  seg = segOverride;
697  } else {
698  seg = defaultSeg;
699  }
700  SgAsmMemoryReferenceExpression* mr = SageBuilderAsm::makeMemoryReference(addressExpr,
701  makeSegmentRegister(seg, insnSize==x86_insnsize_64));
702  return mr;
703 }
704 
705 void
706 DisassemblerX86::fillInModRM(RegisterMode rmMode, SgAsmType *t)
707 {
708  if (modeField == 3) {
709  modrm = makeRegister((rexB ? 8 : 0) + rmField, rmMode, t);
710  } else {
711  isSgAsmMemoryReferenceExpression(modrm)->set_type(t);
712  }
713 }
714 
715 SgAsmExpression *
716 DisassemblerX86::makeModrmNormal(RegisterMode m, SgAsmType* mrType)
717 {
718  ROSE_ASSERT(modregrmByteSet);
719  if (modeField == 3) {
720  /* Register */
721  if (m == rmLegacyByte && rexPresent)
722  m = rmRexByte;
723  return makeRegister((rexB ? 8 : 0) + rmField, m, mrType);
724  } else {
725  SgAsmMemoryReferenceExpression* modrm = decodeModrmMemory();
726  modrm->set_type(mrType);
727  return modrm;
728  }
729 }
730 
731 SgAsmx86RegisterReferenceExpression *
732 DisassemblerX86::makeModrmRegister(RegisterMode m, SgAsmType* mrType)
733 {
734  ROSE_ASSERT(modregrmByteSet);
735  if (m == rmLegacyByte && rexPresent)
736  m = rmRexByte;
737  return makeRegister((rexR ? 8 : 0) + regField, m, mrType);
738 }
739 
740 
741 
742 
743 
744 /*========================================================================================================================
745  * Methods that construct an SgAsmExpression for an immediate operand.
746  *========================================================================================================================*/
747 
748 SgAsmExpression *
749 DisassemblerX86::getImmByte()
750 {
751  size_t bit_offset = 8*insnbufat;
752  SgAsmValueExpression *retval = SageBuilderAsm::makeByteValue(getByte());
753  retval->set_bit_offset(bit_offset);
754  retval->set_bit_size(8);
755  return retval;
756 }
757 
758 SgAsmExpression *
759 DisassemblerX86::getImmWord()
760 {
761  size_t bit_offset = 8*insnbufat;
762  SgAsmValueExpression *retval = SageBuilderAsm::makeWordValue(getWord());
763  retval->set_bit_offset(bit_offset);
764  retval->set_bit_size(16);
765  return retval;
766 }
767 
768 SgAsmExpression *
769 DisassemblerX86::getImmDWord()
770 {
771  size_t bit_offset = 8*insnbufat;
772  SgAsmValueExpression *retval = SageBuilderAsm::makeDWordValue(getDWord());
773  retval->set_bit_offset(bit_offset);
774  retval->set_bit_size(32);
775  return retval;
776 }
777 
778 SgAsmExpression *
779 DisassemblerX86::getImmQWord()
780 {
781  size_t bit_offset = 8*insnbufat;
782  SgAsmValueExpression *retval = SageBuilderAsm::makeQWordValue(getQWord());
783  retval->set_bit_offset(bit_offset);
784  retval->set_bit_size(64);
785  return retval;
786 }
787 
788 SgAsmExpression *
789 DisassemblerX86::getImmForAddr()
790 {
791  switch (effectiveAddressSize()) {
792  case x86_insnsize_16: return getImmWord();
793  case x86_insnsize_32: return getImmDWord();
794  case x86_insnsize_64: return getImmQWord();
795  default: { ROSE_ASSERT(false); /* avoid MSCV warning by adding return stmt */ return NULL; }
796  }
797 }
798 
799 SgAsmExpression *
800 DisassemblerX86::getImmIv()
801 {
802  switch (effectiveOperandSize()) {
803  case x86_insnsize_16: return getImmWord();
804  case x86_insnsize_32: return getImmDWord();
805  case x86_insnsize_64: return getImmQWord();
806  default: { ROSE_ASSERT(false); /* avoid MSCV warning by adding return stmt */ return NULL; }
807  }
808 }
809 
810 SgAsmExpression *
811 DisassemblerX86::getImmJz()
812 {
813  uint64_t val;
814  size_t bit_offset=8*insnbufat, bit_size=0;
815  if (effectiveOperandSize() == x86_insnsize_16) {
816  bit_size = 16;
817  uint16_t val2 = getWord();
818  val = IntegerOps::signExtend<16, 64>((uint64_t)val2);
819  } else {
820  bit_size = 32;
821  uint32_t val2 = getDWord();
822  val = IntegerOps::signExtend<32, 64>((uint64_t)val2);
823  }
824  uint64_t target = ip + insnbufat + val;
825  SgAsmValueExpression *retval = NULL;
826  switch (insnSize) {
827  case x86_insnsize_16:
828  retval = SageBuilderAsm::makeWordValue(target);
829  break;
830  case x86_insnsize_32:
831  retval = SageBuilderAsm::makeDWordValue(target);
832  break;
833  default:
834  retval = SageBuilderAsm::makeQWordValue(target);
835  break;
836  }
837  retval->set_bit_offset(bit_offset);
838  retval->set_bit_size(bit_size);
839  return retval;
840 }
841 
842 SgAsmExpression *
843 DisassemblerX86::getImmByteAsIv()
844 {
845  SgAsmValueExpression *retval = NULL;
846  size_t bit_offset = 8*insnbufat;
847  uint8_t val = getByte();
848  retval = SageBuilderAsm::makeByteValue(val);
849  retval->set_bit_offset(bit_offset);
850  retval->set_bit_size(8);
851  return retval;
852 }
853 
854 SgAsmExpression *
855 DisassemblerX86::getImmIzAsIv()
856 {
857  switch (effectiveOperandSize()) {
858  case x86_insnsize_16:
859  return getImmWord();
860  case x86_insnsize_32:
861  return getImmDWord();
862  case x86_insnsize_64: {
863  return getImmDWord();
864  }
865  default:
866  { ROSE_ASSERT(false); /* avoid MSCV warning by adding return stmt */ return NULL; }
867  }
868 }
869 
870 SgAsmExpression *
871 DisassemblerX86::getImmJb()
872 {
873  size_t bit_offset = 8*insnbufat;
874  uint8_t val = getByte();
875  uint64_t target = ip + insnbufat + IntegerOps::signExtend<8, 64>((uint64_t)val);
876  SgAsmValueExpression *retval=NULL;
877  switch (insnSize) {
878  case x86_insnsize_16:
879  retval = SageBuilderAsm::makeWordValue(target);
880  break;
881  case x86_insnsize_32:
882  retval = SageBuilderAsm::makeDWordValue(target);
883  break;
884  default:
885  retval = SageBuilderAsm::makeQWordValue(target);
886  break;
887  }
888  retval->set_bit_offset(bit_offset);
889  retval->set_bit_size(8);
890  return retval;
891 }
892 
893 
894 
895 
896 
897 /*========================================================================================================================
898  * Main disassembly functions, each generally containing a huge "switch" statement based on one of the opcode bytes.
899  *========================================================================================================================*/
900 
901 /* Mostly copied from the old x86Disassembler.C version */
902 SgAsmx86Instruction *
903 DisassemblerX86::disassemble()
904 {
905  uint8_t opcode = getByte();
906  SgAsmx86Instruction *insn = 0;
907  switch (opcode) {
908  case 0x00: {
909  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
910  insn = makeInstruction(x86_add, "add", modrm, reg);
911  goto done;
912  }
913  case 0x01: {
914  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
915  insn = makeInstruction(x86_add, "add", modrm, reg);
916  goto done;
917  }
918  case 0x02: {
919  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
920  insn = makeInstruction(x86_add, "add", reg, modrm);
921  goto done;
922  }
923  case 0x03: {
924  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
925  insn = makeInstruction(x86_add, "add", reg, modrm);
926  goto done;
927  }
928  case 0x04: {
929  SgAsmExpression* imm = getImmByteAsIv();
930  insn = makeInstruction(x86_add, "add", makeRegister(0, rmLegacyByte), imm);
931  goto done;
932  }
933  case 0x05: {
934  SgAsmExpression* imm = getImmIzAsIv();
935  insn = makeInstruction(x86_add, "add", makeRegisterEffective(0), imm);
936  goto done;
937  }
938  case 0x06: {
939  not64();
940  insn = makeInstruction(x86_push, "push", makeRegister(0, rmSegment));
941  goto done;
942  }
943  case 0x07: {
944  not64();
945  insn = makeInstruction(x86_pop, "pop", makeRegister(0, rmSegment));
946  goto done;
947  }
948  case 0x08: {
949  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
950  insn = makeInstruction(x86_or, "or", modrm, reg);
951  goto done;
952  }
953  case 0x09: {
954  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
955  insn = makeInstruction(x86_or, "or", modrm, reg);
956  goto done;
957  }
958  case 0x0A: {
959  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
960  insn = makeInstruction(x86_or, "or", reg, modrm);
961  goto done;
962  }
963  case 0x0B: {
964  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
965  insn = makeInstruction(x86_or, "or", reg, modrm);
966  goto done;
967  }
968  case 0x0C: {
969  SgAsmExpression* imm = getImmByteAsIv();
970  insn = makeInstruction(x86_or, "or", makeRegister(0, rmLegacyByte), imm);
971  goto done;
972  }
973  case 0x0D: {
974  SgAsmExpression* imm = getImmIzAsIv();
975  insn = makeInstruction(x86_or, "or", makeRegisterEffective(0), imm);
976  goto done;
977  }
978  case 0x0E: {
979  not64();
980  insn = makeInstruction(x86_push, "push", makeRegister(1, rmSegment));
981  goto done;
982  }
983  case 0x0F: {
984  insn = decodeOpcode0F();
985  goto done;
986  }
987  case 0x10: {
988  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
989  insn = makeInstruction(x86_adc, "adc", modrm, reg);
990  goto done;
991  }
992  case 0x11: {
993  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
994  insn = makeInstruction(x86_adc, "adc", modrm, reg);
995  goto done;
996  }
997  case 0x12: {
998  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
999  insn = makeInstruction(x86_adc, "adc", reg, modrm);
1000  goto done;
1001  }
1002  case 0x13: {
1003  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
1004  insn = makeInstruction(x86_adc, "adc", reg, modrm);
1005  goto done;
1006  }
1007  case 0x14: {
1008  SgAsmExpression* imm = getImmByteAsIv();
1009  insn = makeInstruction(x86_adc, "adc", makeRegister(0, rmLegacyByte), imm);
1010  goto done;
1011  }
1012  case 0x15: {
1013  SgAsmExpression* imm = getImmIzAsIv();
1014  insn = makeInstruction(x86_adc, "adc", makeRegisterEffective(0), imm);
1015  goto done;
1016  }
1017  case 0x16: {
1018  not64();
1019  insn = makeInstruction(x86_push, "push", makeRegister(2, rmSegment));
1020  goto done;
1021  }
1022  case 0x17: {
1023  not64();
1024  insn = makeInstruction(x86_pop, "pop", makeRegister(2, rmSegment));
1025  goto done;
1026  }
1027  case 0x18: {
1028  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
1029  insn = makeInstruction(x86_sbb, "sbb", modrm, reg);
1030  goto done;
1031  }
1032  case 0x19: {
1033  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
1034  insn = makeInstruction(x86_sbb, "sbb", modrm, reg);
1035  goto done;
1036  }
1037  case 0x1A: {
1038  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
1039  insn = makeInstruction(x86_sbb, "sbb", reg, modrm);
1040  goto done;
1041  }
1042  case 0x1B: {
1043  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
1044  insn = makeInstruction(x86_sbb, "sbb", reg, modrm);
1045  goto done;
1046  }
1047  case 0x1C: {
1048  SgAsmExpression* imm = getImmByteAsIv();
1049  insn = makeInstruction(x86_sbb, "sbb", makeRegister(0, rmLegacyByte), imm);
1050  goto done;
1051  }
1052  case 0x1D: {
1053  SgAsmExpression* imm = getImmIzAsIv();
1054  insn = makeInstruction(x86_sbb, "sbb", makeRegisterEffective(0), imm);
1055  goto done;
1056  }
1057  case 0x1E: {
1058  not64();
1059  insn = makeInstruction(x86_push, "push", makeRegister(3, rmSegment));
1060  goto done;
1061  }
1062  case 0x1F: {
1063  not64();
1064  insn = makeInstruction(x86_pop, "pop", makeRegister(3, rmSegment));
1065  goto done;
1066  }
1067  case 0x20: {
1068  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
1069  insn = makeInstruction(x86_and, "and", modrm, reg);
1070  goto done;
1071  }
1072  case 0x21: {
1073  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
1074  insn = makeInstruction(x86_and, "and", modrm, reg);
1075  goto done;
1076  }
1077  case 0x22: {
1078  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
1079  insn = makeInstruction(x86_and, "and", reg, modrm);
1080  goto done;
1081  }
1082  case 0x23: {
1083  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
1084  insn = makeInstruction(x86_and, "and", reg, modrm);
1085  goto done;
1086  }
1087  case 0x24: {
1088  SgAsmExpression* imm = getImmByteAsIv();
1089  insn = makeInstruction(x86_and, "and", makeRegister(0, rmLegacyByte), imm);
1090  goto done;
1091  }
1092  case 0x25: {
1093  SgAsmExpression* imm = getImmIzAsIv();
1094  insn = makeInstruction(x86_and, "and", makeRegisterEffective(0), imm);
1095  goto done;
1096  }
1097  case 0x26: {
1098  segOverride = x86_segreg_es;
1099  insn = disassemble();
1100  goto done;
1101  }
1102  case 0x27: {
1103  not64();
1104  insn = makeInstruction(x86_daa, "daa");
1105  goto done;
1106  }
1107  case 0x28: {
1108  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
1109  insn = makeInstruction(x86_sub, "sub", modrm, reg);
1110  goto done;
1111  }
1112  case 0x29: {
1113  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
1114  insn = makeInstruction(x86_sub, "sub", modrm, reg);
1115  goto done;
1116  }
1117  case 0x2A: {
1118  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
1119  insn = makeInstruction(x86_sub, "sub", reg, modrm);
1120  goto done;
1121  }
1122  case 0x2B: {
1123  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
1124  insn = makeInstruction(x86_sub, "sub", reg, modrm);
1125  goto done;
1126  }
1127  case 0x2C: {
1128  SgAsmExpression* imm = getImmByteAsIv();
1129  insn = makeInstruction(x86_sub, "sub", makeRegister(0, rmLegacyByte), imm);
1130  goto done;
1131  }
1132  case 0x2D: {
1133  SgAsmExpression* imm = getImmIzAsIv();
1134  insn = makeInstruction(x86_sub, "sub", makeRegisterEffective(0), imm);
1135  goto done;
1136  }
1137  case 0x2E: {
1138  /* Example of recursive use of disassemble() */
1139  segOverride = x86_segreg_cs;
1140  branchPrediction = x86_branch_prediction_not_taken;
1141  insn = disassemble();
1142  goto done;
1143  }
1144  case 0x2F: {
1145  not64();
1146  insn = makeInstruction(x86_das, "das");
1147  goto done;
1148  }
1149  case 0x30: {
1150  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
1151  insn = makeInstruction(x86_xor, "xor", modrm, reg);
1152  goto done;
1153  }
1154  case 0x31: {
1155  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
1156  insn = makeInstruction(x86_xor, "xor", modrm, reg);
1157  goto done;
1158  }
1159  case 0x32: {
1160  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
1161  insn = makeInstruction(x86_xor, "xor", reg, modrm);
1162  goto done;
1163  }
1164  case 0x33: {
1165  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
1166  insn = makeInstruction(x86_xor, "xor", reg, modrm);
1167  goto done;
1168  }
1169  case 0x34: {
1170  SgAsmExpression* imm = getImmByteAsIv();
1171  insn = makeInstruction(x86_xor, "xor", makeRegister(0, rmLegacyByte), imm);
1172  goto done;
1173  }
1174  case 0x35: {
1175  SgAsmExpression* imm = getImmIzAsIv();
1176  insn = makeInstruction(x86_xor, "xor", makeRegisterEffective(0), imm);
1177  goto done;
1178  }
1179  case 0x36: {
1180  segOverride = x86_segreg_ss;
1181  insn = disassemble();
1182  goto done;
1183  }
1184  case 0x37: {
1185  not64();
1186  insn = makeInstruction(x86_aaa, "aaa");
1187  goto done;
1188  }
1189  case 0x38: {
1190  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
1191  insn = makeInstruction(x86_cmp, "cmp", modrm, reg);
1192  goto done;
1193  }
1194  case 0x39: {
1195  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
1196  insn = makeInstruction(x86_cmp, "cmp", modrm, reg);
1197  goto done;
1198  }
1199  case 0x3A: {
1200  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
1201  insn = makeInstruction(x86_cmp, "cmp", reg, modrm);
1202  goto done;
1203  }
1204  case 0x3B: {
1205  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
1206  insn = makeInstruction(x86_cmp, "cmp", reg, modrm);
1207  goto done;
1208  }
1209  case 0x3C: {
1210  SgAsmExpression* imm = getImmByteAsIv();
1211  insn = makeInstruction(x86_cmp, "cmp", makeRegister(0, rmLegacyByte), imm);
1212  goto done;
1213  }
1214  case 0x3D: {
1215  SgAsmExpression* imm = getImmIzAsIv();
1216  insn = makeInstruction(x86_cmp, "cmp", makeRegisterEffective(0), imm);
1217  goto done;
1218  }
1219  case 0x3E: {
1220  segOverride = x86_segreg_ds;
1221  branchPrediction = x86_branch_prediction_taken;
1222  insn = disassemble();
1223  goto done;
1224  }
1225  case 0x3F: {
1226  not64();
1227  insn = makeInstruction(x86_aas, "aas");
1228  goto done;
1229  }
1230  case 0x40: {
1231  if (longMode()) {
1232  setRex(0x40);
1233  insn = disassemble();
1234  goto done;
1235  } else {
1236  insn = makeInstruction(x86_inc, "inc", makeRegisterEffective(0));
1237  goto done;
1238  }
1239  }
1240  case 0x41: {
1241  if (longMode()) {
1242  setRex(0x41);
1243  insn = disassemble();
1244  goto done;
1245  } else {
1246  insn = makeInstruction(x86_inc, "inc", makeRegisterEffective(1));
1247  goto done;
1248  }
1249  }
1250  case 0x42: {
1251  if (longMode()) {
1252  setRex(0x42);
1253  insn = disassemble();
1254  goto done;
1255  } else {
1256  insn = makeInstruction(x86_inc, "inc", makeRegisterEffective(2));
1257  goto done;
1258  }
1259  }
1260  case 0x43: {
1261  if (longMode()) {
1262  setRex(0x43);
1263  insn = disassemble();
1264  goto done;
1265  } else {
1266  insn = makeInstruction(x86_inc, "inc", makeRegisterEffective(3));
1267  goto done;
1268  }
1269  }
1270  case 0x44: {
1271  if (longMode()) {
1272  setRex(0x44);
1273  insn = disassemble();
1274  goto done;
1275  } else {
1276  insn = makeInstruction(x86_inc, "inc", makeRegisterEffective(4));
1277  goto done;
1278  }
1279  }
1280  case 0x45: {
1281  if (longMode()) {
1282  setRex(0x45);
1283  insn = disassemble();
1284  goto done;
1285  } else {
1286  insn = makeInstruction(x86_inc, "inc", makeRegisterEffective(5));
1287  goto done;
1288  }
1289  }
1290  case 0x46: {
1291  if (longMode()) {
1292  setRex(0x46);
1293  insn = disassemble();
1294  goto done;
1295  } else {
1296  insn = makeInstruction(x86_inc, "inc", makeRegisterEffective(6));
1297  goto done;
1298  }
1299  }
1300  case 0x47: {
1301  if (longMode()) {
1302  setRex(0x47);
1303  insn = disassemble();
1304  goto done;
1305  } else {
1306  insn = makeInstruction(x86_inc, "inc", makeRegisterEffective(7));
1307  goto done;
1308  }
1309  }
1310  case 0x48: {
1311  if (longMode()) {
1312  setRex(0x48);
1313  insn = disassemble();
1314  goto done;
1315  } else {
1316  insn = makeInstruction(x86_dec, "dec", makeRegisterEffective(0));
1317  goto done;
1318  }
1319  }
1320  case 0x49: {
1321  if (longMode()) {
1322  setRex(0x49);
1323  insn = disassemble();
1324  goto done;
1325  } else {
1326  insn = makeInstruction(x86_dec, "dec", makeRegisterEffective(1));
1327  goto done;
1328  }
1329  }
1330  case 0x4A: {
1331  if (longMode()) {
1332  setRex(0x4A);
1333  insn = disassemble();
1334  goto done;
1335  } else {
1336  insn = makeInstruction(x86_dec, "dec", makeRegisterEffective(2));
1337  goto done;
1338  }
1339  }
1340  case 0x4B: {
1341  if (longMode()) {
1342  setRex(0x4B);
1343  insn = disassemble();
1344  goto done;
1345  } else {
1346  insn = makeInstruction(x86_dec, "dec", makeRegisterEffective(3));
1347  goto done;
1348  }
1349  }
1350  case 0x4C: {
1351  if (longMode()) {
1352  setRex(0x4C);
1353  insn = disassemble();
1354  goto done;
1355  } else {
1356  insn = makeInstruction(x86_dec, "dec", makeRegisterEffective(4));
1357  goto done;
1358  }
1359  }
1360  case 0x4D: {
1361  if (longMode()) {
1362  setRex(0x4D);
1363  insn = disassemble();
1364  goto done;
1365  } else {
1366  insn = makeInstruction(x86_dec, "dec", makeRegisterEffective(5));
1367  goto done;
1368  }
1369  }
1370  case 0x4E: {
1371  if (longMode()) {
1372  setRex(0x4E);
1373  insn = disassemble();
1374  goto done;
1375  } else {
1376  insn = makeInstruction(x86_dec, "dec", makeRegisterEffective(6));
1377  goto done;
1378  }
1379  }
1380  case 0x4F: {
1381  if (longMode()) {
1382  setRex(0x4F);
1383  insn = disassemble();
1384  goto done;
1385  } else {
1386  insn = makeInstruction(x86_dec, "dec", makeRegisterEffective(7));
1387  goto done;
1388  }
1389  }
1390  case 0x50: {
1391  sizeMustBe64Bit = true;
1392  insn = makeInstruction(x86_push, "push", makeRegisterEffective(rexB, 0));
1393  goto done;
1394  }
1395  case 0x51: {
1396  sizeMustBe64Bit = true;
1397  insn = makeInstruction(x86_push, "push", makeRegisterEffective(rexB, 1));
1398  goto done;
1399  }
1400  case 0x52: {
1401  sizeMustBe64Bit = true;
1402  insn = makeInstruction(x86_push, "push", makeRegisterEffective(rexB, 2));
1403  goto done;
1404  }
1405  case 0x53: {
1406  sizeMustBe64Bit = true;
1407  insn = makeInstruction(x86_push, "push", makeRegisterEffective(rexB, 3));
1408  goto done;
1409  }
1410  case 0x54: {
1411  sizeMustBe64Bit = true;
1412  insn = makeInstruction(x86_push, "push", makeRegisterEffective(rexB, 4));
1413  goto done;
1414  }
1415  case 0x55: {
1416  sizeMustBe64Bit = true;
1417  insn = makeInstruction(x86_push, "push", makeRegisterEffective(rexB, 5));
1418  goto done;
1419  }
1420  case 0x56: {
1421  sizeMustBe64Bit = true;
1422  insn = makeInstruction(x86_push, "push", makeRegisterEffective(rexB, 6));
1423  goto done;
1424  }
1425  case 0x57: {
1426  sizeMustBe64Bit = true;
1427  insn = makeInstruction(x86_push, "push", makeRegisterEffective(rexB, 7));
1428  goto done;
1429  }
1430  case 0x58: {
1431  sizeMustBe64Bit = true;
1432  insn = makeInstruction(x86_pop, "pop", makeRegisterEffective(rexB, 0));
1433  goto done;
1434  }
1435  case 0x59: {
1436  sizeMustBe64Bit = true;
1437  insn = makeInstruction(x86_pop, "pop", makeRegisterEffective(rexB, 1));
1438  goto done;
1439  }
1440  case 0x5A: {
1441  sizeMustBe64Bit = true;
1442  insn = makeInstruction(x86_pop, "pop", makeRegisterEffective(rexB, 2));
1443  goto done;
1444  }
1445  case 0x5B: {
1446  sizeMustBe64Bit = true;
1447  insn = makeInstruction(x86_pop, "pop", makeRegisterEffective(rexB, 3));
1448  goto done;
1449  }
1450  case 0x5C: {
1451  sizeMustBe64Bit = true;
1452  insn = makeInstruction(x86_pop, "pop", makeRegisterEffective(rexB, 4));
1453  goto done;
1454  }
1455  case 0x5D: {
1456  sizeMustBe64Bit = true;
1457  insn = makeInstruction(x86_pop, "pop", makeRegisterEffective(rexB, 5));
1458  goto done;
1459  }
1460  case 0x5E: {
1461  sizeMustBe64Bit = true;
1462  insn = makeInstruction(x86_pop, "pop", makeRegisterEffective(rexB, 6));
1463  goto done;
1464  }
1465  case 0x5F: {
1466  sizeMustBe64Bit = true;
1467  insn = makeInstruction(x86_pop, "pop", makeRegisterEffective(rexB, 7));
1468  goto done;
1469  }
1470  case 0x60: {
1471  not64();
1472  if (effectiveOperandSize() == x86_insnsize_32) {
1473  insn = makeInstruction(x86_pushad, "pushad");
1474  } else {
1475  insn = makeInstruction(x86_pusha, "pusha");
1476  }
1477  goto done;
1478  }
1479  case 0x61: {
1480  not64();
1481  if (effectiveOperandSize() == x86_insnsize_32) {
1482  insn = makeInstruction(x86_popad, "popad");
1483  } else {
1484  insn = makeInstruction(x86_popa, "popa");
1485  }
1486  goto done;
1487  }
1488  case 0x62: {
1489  not64();
1490  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
1491  requireMemory();
1492  insn = makeInstruction(x86_bound, "bound", reg, modrm);
1493  goto done;
1494  }
1495  case 0x63: {
1496  if (longMode()) {
1497  getModRegRM(effectiveOperandMode(), rmDWord, DWORDT);
1498  insn = makeInstruction(x86_movsxd, "movsxd", reg, modrm);
1499  goto done;
1500  } else {
1501  getModRegRM(rmWord, rmWord, WORDT);
1502  insn = makeInstruction(x86_arpl, "arpl", modrm, reg);
1503  goto done;
1504  }
1505  }
1506  case 0x64: {
1507  segOverride = x86_segreg_fs;
1508  insn = disassemble();
1509  goto done;
1510  }
1511  case 0x65: {
1512  segOverride = x86_segreg_gs;
1513  insn = disassemble();
1514  goto done;
1515  }
1516  case 0x66: {
1517  operandSizeOverride = true;
1518  insn = disassemble();
1519  goto done;
1520  }
1521  case 0x67: {
1522  addressSizeOverride = true;
1523  insn = disassemble();
1524  goto done;
1525  }
1526  case 0x68: {
1527  sizeMustBe64Bit = true;
1528  SgAsmExpression* imm = getImmIzAsIv();
1529  insn = makeInstruction(x86_push, "push", imm);
1530  goto done;
1531  }
1532  case 0x69: {
1533  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
1534  SgAsmExpression* imm = getImmIzAsIv();
1535  insn = makeInstruction(x86_imul, "imul", reg, modrm, imm);
1536  goto done;
1537  }
1538  case 0x6A: {
1539  sizeMustBe64Bit = true;
1540  SgAsmExpression* imm = getImmByteAsIv();
1541  insn = makeInstruction(x86_push, "push", imm);
1542  goto done;
1543  }
1544  case 0x6B: {
1545  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
1546  SgAsmExpression* imm = getImmByteAsIv();
1547  insn = makeInstruction(x86_imul, "imul", reg, modrm, imm);
1548  goto done;
1549  }
1550  case 0x6C: {
1551  switch (repeatPrefix) {
1552  case x86_repeat_none:
1553  insn = makeInstruction(x86_insb, "insb");
1554  goto done;
1555  case x86_repeat_repe:
1556  insn = makeInstruction(x86_rep_insb, "rep_insb");
1557  goto done;
1558  default:
1559  throw ExceptionX86("bad repeat prefix for insb", this);
1560  }
1561  }
1562  case 0x6D: {
1563  switch (effectiveOperandSize()) {
1564  case x86_insnsize_16:
1565  switch (repeatPrefix) {
1566  case x86_repeat_none:
1567  insn = makeInstruction(x86_insw, "insw");
1568  goto done;
1569  case x86_repeat_repe:
1570  insn = makeInstruction(x86_rep_insw, "rep_insw");
1571  goto done;
1572  default:
1573  throw ExceptionX86("bad repeat prefix for insw", this);
1574  }
1575  case x86_insnsize_32:
1576  case x86_insnsize_64:
1577  switch (repeatPrefix) {
1578  case x86_repeat_none:
1579  insn = makeInstruction(x86_insd, "insd");
1580  goto done;
1581  case x86_repeat_repe:
1582  insn = makeInstruction(x86_rep_insd, "rep_insd");
1583  goto done;
1584  default:
1585  throw ExceptionX86("bad repeat prefix for insd", this);
1586  }
1587  default: ROSE_ASSERT(false);
1588  }
1589  }
1590  case 0x6E: {
1591  switch (repeatPrefix) {
1592  case x86_repeat_none:
1593  insn = makeInstruction(x86_outsb, "outsb");
1594  goto done;
1595  case x86_repeat_repe:
1596  insn = makeInstruction(x86_rep_outsb, "rep_outsb");
1597  goto done;
1598  default:
1599  throw ExceptionX86("bad repeat prefix for outsb", this);
1600  }
1601  }
1602  case 0x6F: {
1603  switch (effectiveOperandSize()) {
1604  case x86_insnsize_16:
1605  switch (repeatPrefix) {
1606  case x86_repeat_none:
1607  insn = makeInstruction(x86_outsw, "outsw");
1608  goto done;
1609  case x86_repeat_repe:
1610  insn = makeInstruction(x86_rep_outsw, "rep_outsw");
1611  goto done;
1612  default:
1613  throw ExceptionX86("bad repeat prefix for outsw", this);
1614  }
1615  case x86_insnsize_32:
1616  case x86_insnsize_64:
1617  switch (repeatPrefix) {
1618  case x86_repeat_none:
1619  insn = makeInstruction(x86_outsd, "outsd");
1620  goto done;
1621  case x86_repeat_repe:
1622  insn = makeInstruction(x86_rep_outsd, "rep_outsd");
1623  goto done;
1624  default:
1625  throw ExceptionX86("bad repeat prefix for outsd", this);
1626  }
1627  default: ROSE_ASSERT(false);
1628  }
1629  }
1630  case 0x70: {
1631  SgAsmExpression* imm = getImmJb();
1632  branchPredictionEnabled = true;
1633  insn = makeInstruction(x86_jo, "jo", imm);
1634  goto done;
1635  }
1636  case 0x71: {
1637  SgAsmExpression* imm = getImmJb();
1638  branchPredictionEnabled = true;
1639  insn = makeInstruction(x86_jno, "jno", imm);
1640  goto done;
1641  }
1642  case 0x72: {
1643  SgAsmExpression* imm = getImmJb();
1644  branchPredictionEnabled = true;
1645  insn = makeInstruction(x86_jb, "jb", imm);
1646  goto done;
1647  }
1648  case 0x73: {
1649  SgAsmExpression* imm = getImmJb();
1650  branchPredictionEnabled = true;
1651  insn = makeInstruction(x86_jae, "jae", imm);
1652  goto done;
1653  }
1654  case 0x74: {
1655  SgAsmExpression* imm = getImmJb();
1656  branchPredictionEnabled = true;
1657  insn = makeInstruction(x86_je, "je", imm);
1658  goto done;
1659  }
1660  case 0x75: {
1661  SgAsmExpression* imm = getImmJb();
1662  branchPredictionEnabled = true;
1663  insn = makeInstruction(x86_jne, "jne", imm);
1664  goto done;
1665  }
1666  case 0x76: {
1667  SgAsmExpression* imm = getImmJb();
1668  branchPredictionEnabled = true;
1669  insn = makeInstruction(x86_jbe, "jbe", imm);
1670  goto done;
1671  }
1672  case 0x77: {
1673  SgAsmExpression* imm = getImmJb();
1674  branchPredictionEnabled = true;
1675  insn = makeInstruction(x86_ja, "ja", imm);
1676  goto done;
1677  }
1678  case 0x78: {
1679  SgAsmExpression* imm = getImmJb();
1680  branchPredictionEnabled = true;
1681  insn = makeInstruction(x86_js, "js", imm);
1682  goto done;
1683  }
1684  case 0x79: {
1685  SgAsmExpression* imm = getImmJb();
1686  branchPredictionEnabled = true;
1687  insn = makeInstruction(x86_jns, "jns", imm);
1688  goto done;
1689  }
1690  case 0x7A: {
1691  SgAsmExpression* imm = getImmJb();
1692  branchPredictionEnabled = true;
1693  insn = makeInstruction(x86_jpe, "jpe", imm);
1694  goto done;
1695  }
1696  case 0x7B: {
1697  SgAsmExpression* imm = getImmJb();
1698  branchPredictionEnabled = true;
1699  insn = makeInstruction(x86_jpo, "jpo", imm);
1700  goto done;
1701  }
1702  case 0x7C: {
1703  SgAsmExpression* imm = getImmJb();
1704  branchPredictionEnabled = true;
1705  insn = makeInstruction(x86_jl, "jl", imm);
1706  goto done;
1707  }
1708  case 0x7D: {
1709  SgAsmExpression* imm = getImmJb();
1710  branchPredictionEnabled = true;
1711  insn = makeInstruction(x86_jge, "jge", imm);
1712  goto done;
1713  }
1714  case 0x7E: {
1715  SgAsmExpression* imm = getImmJb();
1716  branchPredictionEnabled = true;
1717  insn = makeInstruction(x86_jle, "jle", imm);
1718  goto done;
1719  }
1720  case 0x7F: {
1721  SgAsmExpression* imm = getImmJb();
1722  branchPredictionEnabled = true;
1723  insn = makeInstruction(x86_jg, "jg", imm);
1724  goto done;
1725  }
1726  case 0x80: {
1727  /* The names for groups will make more sense relative to the AMD manual. */
1728  getModRegRM(rmReturnNull, rmLegacyByte, BYTET);
1729  SgAsmExpression* imm = getImmByte();
1730  insn = decodeGroup1(imm);
1731  goto done;
1732  }
1733  case 0x81: {
1734  /* effectiveOperandMode() returns register mode for the effective operand size (16bit, 32, bit, 64bit)
1735  * effectiveOperandType() does the same thing but returne a SgAsmType. */
1736  getModRegRM(rmReturnNull, effectiveOperandMode(), effectiveOperandType());
1737  SgAsmExpression* imm = getImmIzAsIv();
1738  insn = decodeGroup1(imm);
1739  goto done;
1740  }
1741  case 0x82: {
1742  not64();
1743  getModRegRM(rmReturnNull, rmLegacyByte, BYTET);
1744  SgAsmExpression* imm = getImmByte();
1745  insn = decodeGroup1(imm);
1746  goto done;
1747  }
1748  case 0x83: {
1749  getModRegRM(rmReturnNull, effectiveOperandMode(), effectiveOperandType());
1750  SgAsmExpression* imm = getImmByteAsIv();
1751  insn = decodeGroup1(imm);
1752  goto done;
1753  }
1754  case 0x84: {
1755  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
1756  insn = makeInstruction(x86_test, "test", modrm, reg);
1757  goto done;
1758  }
1759  case 0x85: {
1760  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
1761  insn = makeInstruction(x86_test, "test", modrm, reg);
1762  goto done;
1763  }
1764  case 0x86: {
1765  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
1766  insn = makeInstruction(x86_xchg, "xchg", modrm, reg);
1767  goto done;
1768  }
1769  case 0x87: {
1770  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
1771  insn = makeInstruction(x86_xchg, "xchg", modrm, reg);
1772  goto done;
1773  }
1774  case 0x88: {
1775  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
1776  insn = makeInstruction(x86_mov, "mov", modrm, reg);
1777  goto done;
1778  }
1779  case 0x89: {
1780  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
1781  insn = makeInstruction(x86_mov, "mov", modrm, reg);
1782  goto done;
1783  }
1784  case 0x8A: {
1785  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
1786  insn = makeInstruction(x86_mov, "mov", reg, modrm);
1787  goto done;
1788  }
1789  case 0x8B: {
1790  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
1791  insn = makeInstruction(x86_mov, "mov", reg, modrm);
1792  goto done;
1793  }
1794  case 0x8C: {
1795  getModRegRM(rmSegment, effectiveOperandMode(), WORDT);
1796  insn = makeInstruction(x86_mov, "mov", modrm, reg);
1797  goto done;
1798  }
1799  case 0x8D: {
1800  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
1801  requireMemory();
1802  insn = makeInstruction(x86_lea, "lea", reg, modrm);
1803  goto done;
1804  }
1805  case 0x8E: {
1806  getModRegRM(rmSegment, rmWord, WORDT);
1807  insn = makeInstruction(x86_mov, "mov", reg, modrm);
1808  goto done;
1809  }
1810  case 0x8F: {
1811  getModRegRM(rmReturnNull, effectiveOperandMode(), effectiveOperandType());
1812  insn = decodeGroup1a();
1813  goto done;
1814  }
1815  case 0x90: {
1816  if (rexB) {
1817  insn = makeInstruction(x86_xchg, "xchg", makeRegisterEffective(8), makeRegisterEffective(0));
1818  goto done;
1819  } else if (repeatPrefix == x86_repeat_repe) {
1820  insn = makeInstruction(x86_pause, "pause");
1821  goto done;
1822  } else {
1823  insn = makeInstruction(x86_nop, "nop");
1824  goto done;
1825  }
1826  }
1827  case 0x91: {
1828  insn = makeInstruction(x86_xchg, "xchg", makeRegisterEffective(rexB, 1), makeRegisterEffective(0));
1829  goto done;
1830  }
1831  case 0x92: {
1832  insn = makeInstruction(x86_xchg, "xchg", makeRegisterEffective(rexB, 2), makeRegisterEffective(0));
1833  goto done;
1834  }
1835  case 0x93: {
1836  insn = makeInstruction(x86_xchg, "xchg", makeRegisterEffective(rexB, 3), makeRegisterEffective(0));
1837  goto done;
1838  }
1839  case 0x94: {
1840  insn = makeInstruction(x86_xchg, "xchg", makeRegisterEffective(rexB, 4), makeRegisterEffective(0));
1841  goto done;
1842  }
1843  case 0x95: {
1844  insn = makeInstruction(x86_xchg, "xchg", makeRegisterEffective(rexB, 5), makeRegisterEffective(0));
1845  goto done;
1846  }
1847  case 0x96: {
1848  insn = makeInstruction(x86_xchg, "xchg", makeRegisterEffective(rexB, 6), makeRegisterEffective(0));
1849  goto done;
1850  }
1851  case 0x97: {
1852  insn = makeInstruction(x86_xchg, "xchg", makeRegisterEffective(rexB, 7), makeRegisterEffective(0));
1853  goto done;
1854  }
1855  case 0x98: {
1856  switch (effectiveOperandSize()) {
1857  case x86_insnsize_16:
1858  insn = makeInstruction(x86_cbw, "cbw");
1859  goto done;
1860  case x86_insnsize_32:
1861  insn = makeInstruction(x86_cwde, "cwde");
1862  goto done;
1863  case x86_insnsize_64:
1864  insn = makeInstruction(x86_cdqe, "cdqe");
1865  goto done;
1866  default:
1867  ROSE_ASSERT(false);
1868  }
1869  }
1870  case 0x99: {
1871  switch (effectiveOperandSize()) {
1872  case x86_insnsize_16:
1873  insn = makeInstruction(x86_cwd, "cwd");
1874  goto done;
1875  case x86_insnsize_32:
1876  insn = makeInstruction(x86_cdq, "cdq");
1877  goto done;
1878  case x86_insnsize_64:
1879  insn = makeInstruction(x86_cqo, "cqo");
1880  goto done;
1881  default:
1882  ROSE_ASSERT(false);
1883  }
1884  }
1885  case 0x9A: {
1886  not64();
1887  SgAsmExpression* addr = getImmForAddr();
1888  SgAsmExpression* seg = getImmWord();
1889  insn = makeInstruction(x86_farcall, "farCall", seg, addr);
1890  goto done;
1891  }
1892  case 0x9B: {
1893  insn = makeInstruction(x86_wait, "wait");
1894  goto done;
1895  }
1896  case 0x9C: {
1897  sizeMustBe64Bit = true;
1898  switch (effectiveOperandSize()) {
1899  case x86_insnsize_16:
1900  insn = makeInstruction(x86_pushf, "pushf");
1901  goto done;
1902  case x86_insnsize_32:
1903  insn = makeInstruction(x86_pushfd, "pushfd");
1904  goto done;
1905  case x86_insnsize_64:
1906  insn = makeInstruction(x86_pushfq, "pushfq");
1907  goto done;
1908  default:
1909  ROSE_ASSERT(false);
1910  }
1911  }
1912  case 0x9D: {
1913  sizeMustBe64Bit = true;
1914  switch (effectiveOperandSize()) {
1915  case x86_insnsize_16:
1916  insn = makeInstruction(x86_popf, "popf");
1917  goto done;
1918  case x86_insnsize_32:
1919  insn = makeInstruction(x86_popfd, "popfd");
1920  goto done;
1921  case x86_insnsize_64:
1922  insn = makeInstruction(x86_popfq, "popfq");
1923  goto done;
1924  default:
1925  ROSE_ASSERT(false);
1926  }
1927  }
1928  case 0x9E: {
1929  insn = makeInstruction(x86_sahf, "sahf");
1930  goto done;
1931  }
1932  case 0x9F: {
1933  insn = makeInstruction(x86_lahf, "lahf");
1934  goto done;
1935  }
1936  case 0xA0: {
1937  SgAsmExpression* addr = getImmForAddr();
1938  insn = makeInstruction(x86_mov, "mov", makeRegister(0, rmLegacyByte),
1939  SageBuilderAsm::makeMemoryReference(addr, currentDataSegment(), BYTET));
1940  goto done;
1941  }
1942  case 0xA1: {
1943  SgAsmExpression* addr = getImmForAddr();
1944  insn = makeInstruction(x86_mov, "mov", makeRegisterEffective(0),
1945  SageBuilderAsm::makeMemoryReference(addr, currentDataSegment(), effectiveOperandType()));
1946  goto done;
1947  }
1948  case 0xA2: {
1949  SgAsmExpression* addr = getImmForAddr();
1950  insn = makeInstruction(x86_mov, "mov",
1951  SageBuilderAsm::makeMemoryReference(addr, currentDataSegment(), BYTET),
1952  makeRegister(0, rmLegacyByte));
1953  goto done;
1954  }
1955  case 0xA3: {
1956  SgAsmExpression* addr = getImmForAddr();
1957  insn = makeInstruction(x86_mov, "mov",
1958  SageBuilderAsm::makeMemoryReference(addr, currentDataSegment(), effectiveOperandType()),
1959  makeRegisterEffective(0));
1960  goto done;
1961  }
1962  case 0xA4: {
1963  switch (repeatPrefix) {
1964  case x86_repeat_none:
1965  insn = makeInstruction(x86_movsb, "movsb");
1966  goto done;
1967  case x86_repeat_repe:
1968  insn = makeInstruction(x86_rep_movsb, "rep_movsb");
1969  goto done;
1970  default:
1971  throw ExceptionX86("bad repeat prefix for movsb", this);
1972  }
1973  }
1974  case 0xA5: {
1975  switch (effectiveOperandSize()) {
1976  case x86_insnsize_16:
1977  switch (repeatPrefix) {
1978  case x86_repeat_none:
1979  insn = makeInstruction(x86_movsw, "movsw");
1980  goto done;
1981  case x86_repeat_repe:
1982  insn = makeInstruction(x86_rep_movsw, "rep_movsw");
1983  goto done;
1984  default:
1985  throw ExceptionX86("bad repeat prefix for movsw", this);
1986  }
1987  case x86_insnsize_32:
1988  switch (repeatPrefix) {
1989  case x86_repeat_none:
1990  insn = makeInstruction(x86_movsd, "movsd");
1991  goto done;
1992  case x86_repeat_repe:
1993  insn = makeInstruction(x86_rep_movsd, "rep_movsd");
1994  goto done;
1995  default:
1996  throw ExceptionX86("bad repeat prefix for movsd", this);
1997  }
1998  case x86_insnsize_64:
1999  switch (repeatPrefix) {
2000  case x86_repeat_none:
2001  insn = makeInstruction(x86_movsq, "movsq");
2002  goto done;
2003  case x86_repeat_repe:
2004  insn = makeInstruction(x86_rep_movsq, "rep_movsq");
2005  goto done;
2006  default:
2007  throw ExceptionX86("bad repeat prefix for movsq", this);
2008  }
2009  default: ROSE_ASSERT(false);
2010  }
2011  }
2012  case 0xA6: {
2013  switch (repeatPrefix) {
2014  case x86_repeat_none:
2015  insn = makeInstruction(x86_cmpsb, "cmpsb");
2016  goto done;
2017  case x86_repeat_repe:
2018  insn = makeInstruction(x86_repe_cmpsb, "repe_cmpsb");
2019  goto done;
2020  case x86_repeat_repne:
2021  insn = makeInstruction(x86_repne_cmpsb, "repne_cmpsb");
2022  goto done;
2023  default:
2024  throw ExceptionX86("bad repeat prefix for cmpsb", this);
2025  }
2026  }
2027  case 0xA7: {
2028  switch (effectiveOperandSize()) {
2029  case x86_insnsize_16:
2030  switch (repeatPrefix) {
2031  case x86_repeat_none:
2032  insn = makeInstruction(x86_cmpsw, "cmpsw");
2033  goto done;
2034  case x86_repeat_repe:
2035  insn = makeInstruction(x86_repe_cmpsw, "repe_cmpsw");
2036  goto done;
2037  case x86_repeat_repne:
2038  insn = makeInstruction(x86_repne_cmpsw, "repne_cmpsw");
2039  goto done;
2040  default:
2041  throw ExceptionX86("bad repeat prefix for cmpsw", this);
2042  }
2043  case x86_insnsize_32:
2044  switch (repeatPrefix) {
2045  case x86_repeat_none:
2046  insn = makeInstruction(x86_cmpsd, "cmpsd");
2047  goto done;
2048  case x86_repeat_repe:
2049  insn = makeInstruction(x86_repe_cmpsd, "repe_cmpsd");
2050  goto done;
2051  case x86_repeat_repne:
2052  insn = makeInstruction(x86_repne_cmpsd, "repne_cmpsd");
2053  goto done;
2054  default:
2055  throw ExceptionX86("bad repeat prefix for cmpsd", this);
2056  }
2057  case x86_insnsize_64:
2058  switch (repeatPrefix) {
2059  case x86_repeat_none:
2060  insn = makeInstruction(x86_cmpsq, "cmpsq");
2061  goto done;
2062  case x86_repeat_repe:
2063  insn = makeInstruction(x86_repe_cmpsq, "repe_cmpsq");
2064  goto done;
2065  case x86_repeat_repne:
2066  insn = makeInstruction(x86_repne_cmpsq, "repne_cmpsq");
2067  goto done;
2068  default:
2069  throw ExceptionX86("bad repeat prefix for cmpsq", this);
2070  }
2071  default: ROSE_ASSERT(false);
2072  }
2073  }
2074  case 0xA8: {
2075  SgAsmExpression* imm = getImmByte();
2076  insn = makeInstruction(x86_test, "test", makeRegister(0, rmLegacyByte), imm);
2077  goto done;
2078  }
2079  case 0xA9: {
2080  SgAsmExpression* imm = getImmIzAsIv();
2081  insn = makeInstruction(x86_test, "test", makeRegisterEffective(0), imm);
2082  goto done;
2083  }
2084  case 0xAA: {
2085  switch (repeatPrefix) {
2086  case x86_repeat_none:
2087  insn = makeInstruction(x86_stosb, "stosb");
2088  goto done;
2089  case x86_repeat_repe:
2090  insn = makeInstruction(x86_rep_stosb, "rep_stosb");
2091  goto done;
2092  default:
2093  throw ExceptionX86("bad repeat prefix for stosb", this);
2094  }
2095  }
2096  case 0xAB: {
2097  switch (effectiveOperandSize()) {
2098  case x86_insnsize_16:
2099  switch (repeatPrefix) {
2100  case x86_repeat_none:
2101  insn = makeInstruction(x86_stosw, "stosw");
2102  goto done;
2103  case x86_repeat_repe:
2104  insn = makeInstruction(x86_rep_stosw, "rep_stosw");
2105  goto done;
2106  default:
2107  throw ExceptionX86("bad repeat prefix for stosw", this);
2108  }
2109  case x86_insnsize_32:
2110  switch (repeatPrefix) {
2111  case x86_repeat_none:
2112  insn = makeInstruction(x86_stosd, "stosd");
2113  goto done;
2114  case x86_repeat_repe:
2115  insn = makeInstruction(x86_rep_stosd, "rep_stosd");
2116  goto done;
2117  default:
2118  throw ExceptionX86("bad repeat prefix for stosd", this);
2119  }
2120  case x86_insnsize_64:
2121  switch (repeatPrefix) {
2122  case x86_repeat_none:
2123  insn = makeInstruction(x86_stosq, "stosq");
2124  goto done;
2125  case x86_repeat_repe:
2126  insn = makeInstruction(x86_rep_stosq, "rep_stosq");
2127  goto done;
2128  default: throw ExceptionX86("bad repeat prefix for stosq", this);
2129  }
2130  default:
2131  ROSE_ASSERT(false);
2132  }
2133  }
2134  case 0xAC: {
2135  switch (repeatPrefix) {
2136  case x86_repeat_none:
2137  insn = makeInstruction(x86_lodsb, "lodsb");
2138  goto done;
2139  case x86_repeat_repe:
2140  insn = makeInstruction(x86_rep_lodsb, "rep_lodsb");
2141  goto done;
2142  default:
2143  throw ExceptionX86("bad repeat prefix for lodsb", this);
2144  }
2145  }
2146  case 0xAD: {
2147  switch (effectiveOperandSize()) {
2148  case x86_insnsize_16:
2149  switch (repeatPrefix) {
2150  case x86_repeat_none:
2151  insn = makeInstruction(x86_lodsw, "lodsw");
2152  goto done;
2153  case x86_repeat_repe:
2154  insn = makeInstruction(x86_rep_lodsw, "rep_lodsw");
2155  goto done;
2156  default:
2157  throw ExceptionX86("bad repeat prefix for lodsw", this);
2158  }
2159  case x86_insnsize_32:
2160  switch (repeatPrefix) {
2161  case x86_repeat_none:
2162  insn = makeInstruction(x86_lodsd, "lodsd");
2163  goto done;
2164  case x86_repeat_repe:
2165  insn = makeInstruction(x86_rep_lodsd, "rep_lodsd");
2166  goto done;
2167  default:
2168  throw ExceptionX86("bad repeat prefix for lodsd", this);
2169  }
2170  case x86_insnsize_64:
2171  switch (repeatPrefix) {
2172  case x86_repeat_none:
2173  insn = makeInstruction(x86_lodsq, "lodsq");
2174  goto done;
2175  case x86_repeat_repe:
2176  insn = makeInstruction(x86_rep_lodsq, "rep_lodsq");
2177  goto done;
2178  default:
2179  throw ExceptionX86("bad repeat prefix for lodsq", this);
2180  }
2181  default: ROSE_ASSERT(false);
2182  }
2183  }
2184  case 0xAE: {
2185  switch (repeatPrefix) {
2186  case x86_repeat_none:
2187  insn = makeInstruction(x86_scasb, "scasb");
2188  goto done;
2189  case x86_repeat_repe:
2190  insn = makeInstruction(x86_repe_scasb, "repe_scasb");
2191  goto done;
2192  case x86_repeat_repne:
2193  insn = makeInstruction(x86_repne_scasb, "repne_scasb");
2194  goto done;
2195  default:
2196  throw ExceptionX86("bad repeat prefix for scasb", this);
2197  }
2198  }
2199  case 0xAF: {
2200  switch (effectiveOperandSize()) {
2201  case x86_insnsize_16:
2202  switch (repeatPrefix) {
2203  case x86_repeat_none:
2204  insn = makeInstruction(x86_scasw, "scasw");
2205  goto done;
2206  case x86_repeat_repe:
2207  insn = makeInstruction(x86_repe_scasw, "repe_scasw");
2208  goto done;
2209  case x86_repeat_repne:
2210  insn = makeInstruction(x86_repne_scasw, "repne_scasw");
2211  goto done;
2212  default:
2213  throw ExceptionX86("bad repeat prefix for scasw", this);
2214  }
2215  case x86_insnsize_32:
2216  switch (repeatPrefix) {
2217  case x86_repeat_none:
2218  insn = makeInstruction(x86_scasd, "scasd");
2219  goto done;
2220  case x86_repeat_repe:
2221  insn = makeInstruction(x86_repe_scasd, "repe_scasd");
2222  goto done;
2223  case x86_repeat_repne:
2224  insn = makeInstruction(x86_repne_scasd, "repne_scasd");
2225  goto done;
2226  default:
2227  throw ExceptionX86("bad repeat prefix for scasd", this);
2228  }
2229  case x86_insnsize_64:
2230  switch (repeatPrefix) {
2231  case x86_repeat_none:
2232  insn = makeInstruction(x86_scasq, "scasq");
2233  goto done;
2234  case x86_repeat_repe:
2235  insn = makeInstruction(x86_repe_scasq, "repe_scasq");
2236  goto done;
2237  case x86_repeat_repne:
2238  insn = makeInstruction(x86_repne_scasq, "repne_scasq");
2239  goto done;
2240  default:
2241  throw ExceptionX86("bad repeat prefix for scasq", this);
2242  }
2243  default: ROSE_ASSERT(false);
2244  }
2245  }
2246  case 0xB0: {
2247  SgAsmExpression* imm = getImmByte();
2248  insn = makeInstruction(x86_mov, "mov", makeOperandRegisterByte(rexB, 0), imm);
2249  goto done;
2250  }
2251  case 0xB1: {
2252  SgAsmExpression* imm = getImmByte();
2253  insn = makeInstruction(x86_mov, "mov", makeOperandRegisterByte(rexB, 1), imm);
2254  goto done;
2255  }
2256  case 0xB2: {
2257  SgAsmExpression* imm = getImmByte();
2258  insn = makeInstruction(x86_mov, "mov", makeOperandRegisterByte(rexB, 2), imm);
2259  goto done;
2260  }
2261  case 0xB3: {
2262  SgAsmExpression* imm = getImmByte();
2263  insn = makeInstruction(x86_mov, "mov", makeOperandRegisterByte(rexB, 3), imm);
2264  goto done;
2265  }
2266  case 0xB4: {
2267  SgAsmExpression* imm = getImmByte();
2268  insn = makeInstruction(x86_mov, "mov", makeOperandRegisterByte(rexB, 4), imm);
2269  goto done;
2270  }
2271  case 0xB5: {
2272  SgAsmExpression* imm = getImmByte();
2273  insn = makeInstruction(x86_mov, "mov", makeOperandRegisterByte(rexB, 5), imm);
2274  goto done;
2275  }
2276  case 0xB6: {
2277  SgAsmExpression* imm = getImmByte();
2278  insn = makeInstruction(x86_mov, "mov", makeOperandRegisterByte(rexB, 6), imm);
2279  goto done;
2280  }
2281  case 0xB7: {
2282  SgAsmExpression* imm = getImmByte();
2283  insn = makeInstruction(x86_mov, "mov", makeOperandRegisterByte(rexB, 7), imm);
2284  goto done;
2285  }
2286  case 0xB8: {
2287  SgAsmExpression* imm = getImmIv();
2288  insn = makeInstruction(x86_mov, "mov", makeRegisterEffective(rexB, 0), imm);
2289  goto done;
2290  }
2291  case 0xB9: {
2292  SgAsmExpression* imm = getImmIv();
2293  insn = makeInstruction(x86_mov, "mov", makeRegisterEffective(rexB, 1), imm);
2294  goto done;
2295  }
2296  case 0xBA: {
2297  SgAsmExpression* imm = getImmIv();
2298  insn = makeInstruction(x86_mov, "mov", makeRegisterEffective(rexB, 2), imm);
2299  goto done;
2300  }
2301  case 0xBB: {
2302  SgAsmExpression* imm = getImmIv();
2303  insn = makeInstruction(x86_mov, "mov", makeRegisterEffective(rexB, 3), imm);
2304  goto done;
2305  }
2306  case 0xBC: {
2307  SgAsmExpression* imm = getImmIv();
2308  insn = makeInstruction(x86_mov, "mov", makeRegisterEffective(rexB, 4), imm);
2309  goto done;
2310  }
2311  case 0xBD: {
2312  SgAsmExpression* imm = getImmIv();
2313  insn = makeInstruction(x86_mov, "mov", makeRegisterEffective(rexB, 5), imm);
2314  goto done;
2315  }
2316  case 0xBE: {
2317  SgAsmExpression* imm = getImmIv();
2318  insn = makeInstruction(x86_mov, "mov", makeRegisterEffective(rexB, 6), imm);
2319  goto done;
2320  }
2321  case 0xBF: {
2322  SgAsmExpression* imm = getImmIv();
2323  insn = makeInstruction(x86_mov, "mov", makeRegisterEffective(rexB, 7), imm);
2324  goto done;
2325  }
2326  case 0xC0: {
2327  getModRegRM(rmReturnNull, rmLegacyByte, BYTET);
2328  SgAsmExpression* imm = getImmByte();
2329  insn = decodeGroup2(imm);
2330  goto done;
2331  }
2332  case 0xC1: {
2333  getModRegRM(rmReturnNull, effectiveOperandMode(), effectiveOperandType());
2334  SgAsmExpression* imm = getImmByteAsIv();
2335  insn = decodeGroup2(imm);
2336  goto done;
2337  }
2338  case 0xC2: {
2339  isUnconditionalJump = true;
2340  SgAsmExpression* imm = getImmWord();
2341  insn = makeInstruction(x86_ret, "ret", imm);
2342  goto done;
2343  }
2344  case 0xC3: {
2345  isUnconditionalJump = true;
2346  insn = makeInstruction(x86_ret, "ret");
2347  goto done;
2348  }
2349  case 0xC4: {
2350  not64();
2351  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
2352  requireMemory();
2353  insn = makeInstruction(x86_les, "les", reg, modrm);
2354  goto done;
2355  }
2356  case 0xC5: {
2357  not64();
2358  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
2359  requireMemory();
2360  insn = makeInstruction(x86_lds, "lds", reg, modrm);
2361  goto done;
2362  }
2363  case 0xC6: {
2364  getModRegRM(rmReturnNull, rmLegacyByte, BYTET);
2365  SgAsmExpression* imm = getImmByte();
2366  insn = decodeGroup11(imm);
2367  goto done;
2368  }
2369  case 0xC7: {
2370  getModRegRM(rmReturnNull, effectiveOperandMode(), effectiveOperandType());
2371  SgAsmExpression* imm = getImmIzAsIv();
2372  insn = decodeGroup11(imm);
2373  goto done;
2374  }
2375  case 0xC8: {
2376  SgAsmExpression* immw = getImmWord();
2377  SgAsmExpression* imm = getImmByte();
2378  insn = makeInstruction(x86_enter, "enter", immw, imm);
2379  goto done;
2380  }
2381  case 0xC9: {
2382  insn = makeInstruction(x86_leave, "leave");
2383  goto done;
2384  }
2385  case 0xCA: {
2386  isUnconditionalJump = true;
2387  SgAsmExpression* imm = getImmWord();
2388  insn = makeInstruction(x86_retf, "retf", imm);
2389  goto done;
2390  }
2391  case 0xCB: {
2392  isUnconditionalJump = true;
2393  insn = makeInstruction(x86_retf, "retf");
2394  goto done;
2395  }
2396  case 0xCC: {
2397  insn = makeInstruction(x86_int3, "int3");
2398  goto done;
2399  }
2400  case 0xCD: {
2401  SgAsmExpression* imm = getImmByte();
2402  insn = makeInstruction(x86_int, "int", imm);
2403  goto done;
2404  }
2405  case 0xCE: {
2406  not64();
2407  insn = makeInstruction(x86_into, "into");
2408  goto done;
2409  }
2410  case 0xCF: {
2411  isUnconditionalJump = true;
2412  insn = makeInstruction(x86_iret, "iret");
2413  goto done;
2414  }
2415  case 0xD0: {
2416  getModRegRM(rmReturnNull, rmLegacyByte, BYTET);
2417  insn = decodeGroup2(SageBuilderAsm::makeByteValue(1));
2418  goto done;
2419  }
2420  case 0xD1: {
2421  getModRegRM(rmReturnNull, effectiveOperandMode(), effectiveOperandType());
2422  insn = decodeGroup2(SageBuilderAsm::makeByteValue(1));
2423  goto done;
2424  }
2425  case 0xD2: {
2426  getModRegRM(rmReturnNull, rmLegacyByte, BYTET);
2427  insn = decodeGroup2(makeRegister(1, rmLegacyByte));
2428  goto done;
2429  }
2430  case 0xD3: {
2431  getModRegRM(rmReturnNull, effectiveOperandMode(), effectiveOperandType());
2432  insn = decodeGroup2(makeRegister(1, rmLegacyByte));
2433  goto done;
2434  }
2435  case 0xD4: {
2436  not64();
2437  SgAsmExpression* imm = getImmByte();
2438  insn = makeInstruction(x86_aam, "aam", imm);
2439  goto done;
2440  }
2441  case 0xD5: {
2442  not64();
2443  SgAsmExpression* imm = getImmByte();
2444  insn = makeInstruction(x86_aad, "aad", imm);
2445  goto done;
2446  }
2447  case 0xD6: {
2448  not64();
2449  insn = makeInstruction(x86_salc, "salc");
2450  goto done;
2451  }
2452  case 0xD7: {
2453  insn = makeInstruction(x86_xlatb, "xlatb");
2454  goto done;
2455  }
2456  case 0xD8: {
2457  insn = decodeX87InstructionD8();
2458  goto done;
2459  }
2460  case 0xD9: {
2461  insn = decodeX87InstructionD9();
2462  goto done;
2463  }
2464  case 0xDA: {
2465  insn = decodeX87InstructionDA();
2466  goto done;
2467  }
2468  case 0xDB: {
2469  insn = decodeX87InstructionDB();
2470  goto done;
2471  }
2472  case 0xDC: {
2473  insn = decodeX87InstructionDC();
2474  goto done;
2475  }
2476  case 0xDD: {
2477  insn = decodeX87InstructionDD();
2478  goto done;
2479  }
2480  case 0xDE: {
2481  insn = decodeX87InstructionDE();
2482  goto done;
2483  }
2484  case 0xDF: {
2485  insn = decodeX87InstructionDF();
2486  goto done;
2487  }
2488  case 0xE0: {
2489  SgAsmExpression* imm = getImmJb();
2490  insn = makeInstruction(x86_loopnz, "loopnz", imm);
2491  goto done;
2492  }
2493  case 0xE1: {
2494  SgAsmExpression* imm = getImmJb();
2495  insn = makeInstruction(x86_loopz, "loopz", imm);
2496  goto done;
2497  }
2498  case 0xE2: {
2499  SgAsmExpression* imm = getImmJb();
2500  insn = makeInstruction(x86_loop, "loop", imm);
2501  goto done;
2502  }
2503  case 0xE3: {
2504  SgAsmExpression* imm = getImmJb();
2505  branchPredictionEnabled = true;
2506  switch (effectiveOperandSize()) {
2507  case x86_insnsize_16:
2508  insn = makeInstruction(x86_jcxz, "jcxz", imm);
2509  goto done;
2510  case x86_insnsize_32:
2511  insn = makeInstruction(x86_jecxz, "jecxz", imm);
2512  goto done;
2513  case x86_insnsize_64:
2514  insn = makeInstruction(x86_jrcxz, "jrcxz", imm);
2515  goto done;
2516  default:
2517  ROSE_ASSERT(false);
2518  }
2519  }
2520  case 0xE4: {
2521  SgAsmExpression* imm = getImmByte();
2522  insn = makeInstruction(x86_in, "in", makeRegister(0, rmLegacyByte), imm);
2523  goto done;
2524  }
2525  case 0xE5: {
2526  SgAsmExpression* imm = getImmByte();
2527  insn = makeInstruction(x86_in, "in", makeRegisterEffective(0), imm);
2528  goto done;
2529  }
2530  case 0xE6: {
2531  SgAsmExpression* imm = getImmByte();
2532  insn = makeInstruction(x86_out, "out", imm, makeRegister(0, rmLegacyByte));
2533  goto done;
2534  }
2535  case 0xE7: {
2536  SgAsmExpression* imm = getImmByte();
2537  insn = makeInstruction(x86_out, "out", imm, makeRegisterEffective(0));
2538  goto done;
2539  }
2540  case 0xE8: {
2541  SgAsmExpression* imm = getImmJz();
2542  insn = makeInstruction(x86_call, "call", imm);
2543  goto done;
2544  }
2545  case 0xE9: {
2546  SgAsmExpression* imm = getImmJz();
2547  insn = makeInstruction(x86_jmp, "jmp", imm);
2548  isUnconditionalJump = true;
2549  goto done;
2550  }
2551  case 0xEA: {
2552  not64();
2553  SgAsmExpression* addr = getImmForAddr();
2554  SgAsmExpression* seg = getImmWord();
2555  insn = makeInstruction(x86_farjmp, "farJmp", seg, addr);
2556  isUnconditionalJump = true;
2557  goto done;
2558  }
2559  case 0xEB: {
2560  SgAsmExpression* imm = getImmJb();
2561  insn = makeInstruction(x86_jmp, "jmp", imm);
2562  isUnconditionalJump = true;
2563  goto done;
2564  }
2565  case 0xEC: {
2566  insn = makeInstruction(x86_in, "in", makeRegister(0, rmLegacyByte), makeRegister(2, rmWord));
2567  goto done;
2568  }
2569  case 0xED: {
2570  insn = makeInstruction(x86_in, "in", makeRegisterEffective(0), makeRegister(2, rmWord));
2571  goto done;
2572  }
2573  case 0xEE: {
2574  insn = makeInstruction(x86_out, "out", makeRegister(2, rmWord), makeRegister(0, rmLegacyByte));
2575  goto done;
2576  }
2577  case 0xEF: {
2578  insn = makeInstruction(x86_out, "out", makeRegister(2, rmWord), makeRegisterEffective(0));
2579  goto done;
2580  }
2581  case 0xF0: {
2582  lock = true;
2583  insn = disassemble();
2584  goto done;
2585  }
2586  case 0xF1: {
2587  insn = makeInstruction(x86_int1, "int1");
2588  goto done;
2589  }
2590  case 0xF2: {
2591  repeatPrefix = x86_repeat_repne;
2592  insn = disassemble();
2593  goto done;
2594  }
2595  case 0xF3: {
2596  repeatPrefix = x86_repeat_repe;
2597  insn = disassemble();
2598  goto done;
2599  }
2600  case 0xF4: {
2601  insn = makeInstruction(x86_hlt, "hlt");
2602  isUnconditionalJump = true;
2603  goto done;
2604  }
2605  case 0xF5: {
2606  insn = makeInstruction(x86_cmc, "cmc");
2607  goto done;
2608  }
2609  case 0xF6: {
2610  getModRegRM(rmReturnNull, rmLegacyByte, BYTET);
2611  SgAsmExpression* immMaybe = NULL;
2612  if (regField <= 1) {
2613  SgAsmExpression* imm = getImmByteAsIv();
2614  immMaybe = imm;
2615  }
2616  insn = decodeGroup3(immMaybe);
2617  goto done;
2618  }
2619  case 0xF7: {
2620  getModRegRM(rmReturnNull, effectiveOperandMode(), effectiveOperandType());
2621  SgAsmExpression* immMaybe = NULL;
2622  if (regField <= 1) {
2623  SgAsmExpression* imm = getImmIzAsIv();
2624  immMaybe = imm;
2625  }
2626  insn = decodeGroup3(immMaybe);
2627  goto done;
2628  }
2629  case 0xF8: {
2630  insn = makeInstruction(x86_clc, "clc");
2631  goto done;
2632  }
2633  case 0xF9: {
2634  insn = makeInstruction(x86_stc, "stc");
2635  goto done;
2636  }
2637  case 0xFA: {
2638  insn = makeInstruction(x86_cli, "cli");
2639  goto done;
2640  }
2641  case 0xFB: {
2642  insn = makeInstruction(x86_sti, "sti");
2643  goto done;
2644  }
2645  case 0xFC: {
2646  insn = makeInstruction(x86_cld, "cld");
2647  goto done;
2648  }
2649  case 0xFD: {
2650  insn = makeInstruction(x86_std, "std");
2651  goto done;
2652  }
2653  case 0xFE: {
2654  getModRegRM(rmReturnNull, rmLegacyByte, BYTET);
2655  insn = decodeGroup4();
2656  goto done;
2657  }
2658  case 0xFF: {
2659  getModRegRM(rmReturnNull, rmReturnNull, NULL);
2660  if (regField >= 2 && regField <= 6) {
2661  sizeMustBe64Bit = true;
2662  }
2663  fillInModRM(effectiveOperandMode(), effectiveOperandType());
2664  insn = decodeGroup5();
2665  goto done;
2666  }
2667  default: ROSE_ASSERT(!"Should not get here");
2668  }
2669 done:
2670  ROSE_ASSERT(insn);
2671  return insn;
2672 }
2673 
2674 SgAsmx86Instruction *
2675 DisassemblerX86::decodeOpcode0F()
2676 {
2677  uint8_t opcode = getByte();
2678  switch (opcode) {
2679  case 0x00: {
2680  getModRegRM(rmReturnNull, rmWord, WORDT);
2681  return decodeGroup6();
2682  }
2683  case 0x01:
2684  return decodeGroup7();
2685  case 0x02: {
2686  getModRegRM(rmWord, rmWord, WORDT);
2687  return makeInstruction(x86_lar, "lar", reg, modrm);
2688  }
2689  case 0x03: {
2690  getModRegRM(rmWord, rmWord, WORDT);
2691  return makeInstruction(x86_lsl, "lsl", reg, modrm);
2692  }
2693  case 0x04:
2694  throw ExceptionX86("bad opcode 0x0f04", this);
2695  case 0x05:
2696  return makeInstruction(x86_syscall, "syscall");
2697  case 0x06:
2698  return makeInstruction(x86_clts, "clts");
2699  case 0x07:
2700  return makeInstruction(x86_sysret, "sysret");
2701  case 0x08:
2702  return makeInstruction(x86_invd, "invd");
2703  case 0x09:
2704  return makeInstruction(x86_wbinvd, "wbinvd");
2705  case 0x0A:
2706  throw ExceptionX86("bad opcode 0x0f0a", this);
2707  case 0x0B:
2708  return makeInstruction(x86_ud2, "ud2");
2709  case 0x0C:
2710  throw ExceptionX86("bad opcode 0x0f0c", this);
2711  case 0x0D:
2712  return decodeGroupP();
2713  case 0x0E:
2714  return makeInstruction(x86_femms, "femms");
2715  case 0x0F: {
2716  /* 3DNow! (AMD Specific) */
2717  getModRegRM(rmReturnNull, rmReturnNull, NULL);
2718  uint8_t thirdOpcodeByte = getByte();
2719  char opcodestr[16];
2720  sprintf(opcodestr, "0x0f0f%02x", thirdOpcodeByte);
2721  if (thirdOpcodeByte < 0x80) {
2722  /* Conversions */
2723  switch (thirdOpcodeByte) {
2724  case 0x0C: {
2725  fillInModRM(rmMM, V4WORDT);
2726  reg = makeModrmRegister(rmMM, V2FLOATT);
2727  return makeInstruction(x86_pi2fw, "pi2fw", reg, modrm);
2728  }
2729  case 0x0D: {
2730  fillInModRM(rmMM, V2DWORDT);
2731  reg = makeModrmRegister(rmMM, V2FLOATT);
2732  return makeInstruction(x86_pi2fd, "pi2fd", reg, modrm);
2733  }
2734  case 0x1C: {
2735  fillInModRM(rmMM, V2FLOATT);
2736  reg = makeModrmRegister(rmMM, V4WORDT);
2737  return makeInstruction(x86_pf2iw, "pf2iw", reg, modrm);
2738  }
2739  case 0x1D: {
2740  fillInModRM(rmMM, V2FLOATT);
2741  reg = makeModrmRegister(rmMM, V2DWORDT);
2742  return makeInstruction(x86_pf2id, "pf2id", reg, modrm);
2743  }
2744  default:
2745  throw ExceptionX86(std::string("bad opcode ")+opcodestr, this);
2746  }
2747  } else if (thirdOpcodeByte < 0xB7) {
2748  /* Floating-point operations */
2749  fillInModRM(rmMM, V2FLOATT);
2750  reg = makeModrmRegister(rmMM, V2FLOATT);
2751  switch (thirdOpcodeByte) {
2752  case 0x8A: return makeInstruction(x86_pfnacc, "pfnacc", reg, modrm);
2753  case 0x8E: return makeInstruction(x86_pfpnacc, "pfpnacc", reg, modrm);
2754  case 0x90: return makeInstruction(x86_pfcmpge, "pfcmpge", reg, modrm);
2755  case 0x94: return makeInstruction(x86_pfmin, "pfmin", reg, modrm);
2756  case 0x96: return makeInstruction(x86_pfrcp, "pfrcp", reg, modrm);
2757  case 0x97: return makeInstruction(x86_pfrsqrt, "pfrsqrt", reg, modrm);
2758  case 0x9A: return makeInstruction(x86_pfsub, "pfsub", reg, modrm);
2759  case 0x9E: return makeInstruction(x86_pfadd, "pfadd", reg, modrm);
2760  case 0xA0: return makeInstruction(x86_pfcmpgt, "pfcmpgt", reg, modrm);
2761  case 0xA4: return makeInstruction(x86_pfmax, "pfmax", reg, modrm);
2762  case 0xA6: return makeInstruction(x86_pfrcpit1, "pfrcpit1", reg, modrm);
2763  case 0xA7: return makeInstruction(x86_pfrsqit1, "pfrsqit1", reg, modrm);
2764  case 0xAA: return makeInstruction(x86_pfsubr, "pfsubr", reg, modrm);
2765  case 0xAE: return makeInstruction(x86_pfacc, "pfacc", reg, modrm);
2766  case 0xB0: return makeInstruction(x86_pfcmpeq, "pfcmpeq", reg, modrm);
2767  case 0xB4: return makeInstruction(x86_pfmul, "pfmul", reg, modrm);
2768  case 0xB6: return makeInstruction(x86_pfrcpit2, "pfrcpit2", reg, modrm);
2769  default: {
2770  throw ExceptionX86(std::string("bad opcode ")+opcodestr, this);
2771  }
2772  }
2773  } else {
2774  /* Extra integer operations */
2775  switch (thirdOpcodeByte) {
2776  case 0xB7:
2777  getModRegRM(rmMM, rmMM, V4WORDT);
2778  return makeInstruction(x86_pmulhrw, "pmulhrw", reg, modrm);
2779  case 0xBB:
2780  getModRegRM(rmMM, rmMM, V2DWORDT);
2781  return makeInstruction(x86_pswapd, "pswapd", reg, modrm);
2782  case 0xBF:
2783  getModRegRM(rmMM, rmMM, V8BYTET);
2784  return makeInstruction(x86_pavgusb, "pavgusb", reg, modrm);
2785  default:
2786  throw ExceptionX86(std::string("bad opcode ")+opcodestr, this);
2787  }
2788  }
2789  }
2790  case 0x10: {
2791  switch (mmPrefix()) {
2792  case mmNone:
2793  getModRegRM(rmXMM, rmXMM, V4FLOATT);
2794  return makeInstruction(x86_movups, "movups", reg, modrm);
2795  case mmF3:
2796  getModRegRM(rmXMM, rmXMM, FLOATT);
2797  return makeInstruction(x86_movss, "movss", reg, modrm);
2798  case mm66:
2799  getModRegRM(rmXMM, rmXMM, V2DOUBLET);
2800  return makeInstruction(x86_movupd, "movupd", reg, modrm);
2801  case mmF2:
2802  getModRegRM(rmXMM, rmXMM, DOUBLET);
2803  return makeInstruction(x86_movsd_sse, "movsd", reg, modrm);
2804  }
2805  }
2806  case 0x11: {
2807  switch (mmPrefix()) {
2808  case mmNone:
2809  getModRegRM(rmXMM, rmXMM, V4FLOATT);
2810  return makeInstruction(x86_movups, "movups", modrm, reg);
2811  case mmF3:
2812  getModRegRM(rmXMM, rmXMM, FLOATT);
2813  return makeInstruction(x86_movss, "movss", modrm, reg);
2814  case mm66:
2815  getModRegRM(rmXMM, rmXMM, V2DOUBLET);
2816  return makeInstruction(x86_movupd, "movupd", modrm, reg);
2817  case mmF2:
2818  getModRegRM(rmXMM, rmXMM, DOUBLET);
2819  return makeInstruction(x86_movsd_sse, "movsd", modrm, reg);
2820  }
2821  }
2822  case 0x12: {
2823  switch (mmPrefix()) {
2824  case mmNone:
2825  getModRegRM(rmXMM, rmXMM, V4FLOATT);
2826  if (modeField == 3) {
2827  return makeInstruction(x86_movhlps, "movhlps", reg, modrm);
2828  } else {
2829  return makeInstruction(x86_movlps, "movlps", reg, modrm);
2830  }
2831  case mmF3:
2832  getModRegRM(rmXMM, rmXMM, V4FLOATT);
2833  return makeInstruction(x86_movsldup, "movsldup", reg, modrm);
2834  case mm66:
2835  getModRegRM(rmXMM, rmXMM, DOUBLET);
2836  requireMemory();
2837  return makeInstruction(x86_movlpd, "movlpd", reg, modrm);
2838  case mmF2:
2839  getModRegRM(rmXMM, rmXMM, DOUBLET);
2840  return makeInstruction(x86_movddup, "movddup", reg, modrm);
2841  }
2842  }
2843  case 0x13: {
2844  switch (mmPrefix()) {
2845  case mmNone:
2846  getModRegRM(rmXMM, rmXMM, V4FLOATT);
2847  requireMemory();
2848  return makeInstruction(x86_movlps, "movlps", modrm, reg);
2849  case mmF3:
2850  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f13", this);
2851  case mm66:
2852  getModRegRM(rmXMM, rmXMM, DOUBLET);
2853  requireMemory();
2854  return makeInstruction(x86_movlpd, "movlpd", modrm, reg);
2855  case mmF2:
2856  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f13", this);
2857  }
2858  }
2859  case 0x14: {
2860  switch (mmPrefix()) {
2861  case mmNone:
2862  getModRegRM(rmXMM, rmXMM, V2FLOATT, V4FLOATT);
2863  return makeInstruction(x86_unpcklps, "unpcklps", reg, modrm);
2864  case mmF3:
2865  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f14", this);
2866  case mm66:
2867  getModRegRM(rmXMM, rmXMM, DOUBLET, V2DOUBLET);
2868  return makeInstruction(x86_unpcklpd, "unpcklpd", reg, modrm);
2869  case mmF2:
2870  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f14", this);
2871  }
2872  }
2873  case 0x15: {
2874  switch (mmPrefix()) {
2875  case mmNone:
2876  getModRegRM(rmXMM, rmXMM, V2FLOATT, V4FLOATT);
2877  return makeInstruction(x86_unpckhps, "unpckhps", reg, modrm);
2878  case mmF3:
2879  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f15", this);
2880  case mm66:
2881  getModRegRM(rmXMM, rmXMM, DOUBLET, V2DOUBLET);
2882  return makeInstruction(x86_unpckhpd, "unpckhpd", reg, modrm);
2883  case mmF2:
2884  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f15", this);
2885  }
2886  }
2887  case 0x16: {
2888  switch (mmPrefix()) {
2889  case mmNone:
2890  getModRegRM(rmXMM, rmXMM, V4FLOATT);
2891  if (modeField == 3) {
2892  return makeInstruction(x86_movlhps, "movlhps", reg, modrm);
2893  } else {
2894  return makeInstruction(x86_movhps, "movhps", reg, modrm);
2895  }
2896  case mmF3:
2897  getModRegRM(rmXMM, rmXMM, V4FLOATT);
2898  return makeInstruction(x86_movshdup, "movshdup", reg, modrm);
2899  case mm66:
2900  getModRegRM(rmXMM, rmXMM, DOUBLET);
2901  requireMemory();
2902  return makeInstruction(x86_movhpd, "movhpd", reg, modrm);
2903  case mmF2:
2904  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f16", this);
2905  }
2906  }
2907  case 0x17: {
2908  switch (mmPrefix()) {
2909  case mmNone:
2910  getModRegRM(rmXMM, rmXMM, V4FLOATT);
2911  requireMemory();
2912  return makeInstruction(x86_movhps, "movhps", modrm, reg);
2913  case mmF3:
2914  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f17", this);
2915  case mm66:
2916  getModRegRM(rmXMM, rmXMM, DOUBLET);
2917  requireMemory();
2918  return makeInstruction(x86_movhpd, "movhpd", modrm, reg);
2919  case mmF2:
2920  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f17", this);
2921  }
2922  }
2923  case 0x18:
2924  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
2925  return decodeGroup16();
2926  case 0x19:
2927  case 0x1A:
2928  case 0x1B:
2929  case 0x1C:
2930  case 0x1D:
2931  case 0x1E:
2932  /* Undocumented no-ops */
2933  getModRegRM(rmReturnNull, rmReturnNull, NULL);
2934  return makeInstruction(x86_nop, "nop");
2935  case 0x1F:
2936  /* Documented no-op */
2937  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
2938  return makeInstruction(x86_nop, "nop", modrm);
2939 
2940  case 0x20:
2941  /* BUG: The mode and type fields should forced to the current processor number of bits instead of the size
2942  * determied by the operand size flag. See documentation for move to control register ("lock mov cr0, *").
2943  * This may be an AMD specific issue, but the operand size issues is a bug everywhere. */
2944  getModRegRM(rmControl, effectiveOperandMode(), effectiveOperandType());
2945  if (modeField == 3) {
2946  return makeInstruction(x86_mov, "mov", modrm, reg);
2947  } else {
2948  throw ExceptionX86("bad ModR/M value for 0x0f20", this);
2949  }
2950  case 0x21:
2951  getModRegRM(rmDebug, effectiveOperandMode(), effectiveOperandType());
2952  if (modeField == 3) {
2953  return makeInstruction(x86_mov, "mov", modrm, reg);
2954  } else {
2955  throw ExceptionX86("bad ModR/M value for 0x0f21", this);
2956  }
2957  case 0x22:
2958  getModRegRM(rmControl, effectiveOperandMode(), effectiveOperandType());
2959  if (modeField == 3) {
2960  return makeInstruction(x86_mov, "mov", reg, modrm);
2961  } else {
2962  throw ExceptionX86("bad ModR/M value for 0x0f22", this);
2963  }
2964  case 0x23:
2965  getModRegRM(rmDebug, effectiveOperandMode(), effectiveOperandType());
2966  if (modeField == 3) {
2967  return makeInstruction(x86_mov, "mov", reg, modrm);
2968  } else {
2969  throw ExceptionX86("bad ModR/M value for 0x0f23", this);
2970  }
2971  case 0x24:
2972  /* Move from test register */
2973  throw ExceptionX86("bad opcode 0x0f24", this);
2974  case 0x25:
2975  throw ExceptionX86("bad opcode 0x0f25", this);
2976  case 0x26:
2977  /* Move to test register */
2978  throw ExceptionX86("bad opcode 0x0f26", this);
2979  case 0x27:
2980  throw ExceptionX86("bad opcode 0x0f27", this);
2981  case 0x28: {
2982  switch (mmPrefix()) {
2983  case mmNone:
2984  getModRegRM(rmXMM, rmXMM, V4FLOATT);
2985  return makeInstruction(x86_movaps, "movaps", reg, modrm);
2986  case mmF3:
2987  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f28", this);
2988  case mm66:
2989  getModRegRM(rmXMM, rmXMM, V2DOUBLET);
2990  return makeInstruction(x86_movapd, "movapd", reg, modrm);
2991  case mmF2:
2992  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f18", this);
2993  }
2994  }
2995  case 0x29: {
2996  switch (mmPrefix()) {
2997  case mmNone:
2998  getModRegRM(rmXMM, rmXMM, V4FLOATT);
2999  return makeInstruction(x86_movaps, "movaps", modrm, reg);
3000  case mmF3:
3001  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f29", this);
3002  case mm66:
3003  getModRegRM(rmXMM, rmXMM, V2DOUBLET);
3004  return makeInstruction(x86_movapd, "movapd", modrm, reg);
3005  case mmF2:
3006  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f19", this);
3007  }
3008  }
3009  case 0x2A: {
3010  switch (mmPrefix()) {
3011  case mmNone:
3012  getModRegRM(rmXMM, rmMM, V2DWORDT, V4FLOATT);
3013  return makeInstruction(x86_cvtpi2ps, "cvtpi2ps", reg, modrm);
3014  case mmF3:
3015  getModRegRM(rmXMM, effectiveOperandMode(), effectiveOperandType(), V4FLOATT);
3016  return makeInstruction(x86_cvtsi2ss, "cvtsi2ss", reg, modrm);
3017  case mm66:
3018  getModRegRM(rmXMM, rmMM, V2DWORDT, V2DOUBLET);
3019  return makeInstruction(x86_cvtpi2pd, "cvtpi2pd", reg, modrm);
3020  case mmF2:
3021  getModRegRM(rmXMM, effectiveOperandMode(), effectiveOperandType(), V2DOUBLET);
3022  return makeInstruction(x86_cvtsi2sd, "cvtsi2sd", reg, modrm);
3023  }
3024  }
3025  case 0x2B: {
3026  requireMemory();
3027  switch (mmPrefix()) {
3028  case mmNone:
3029  getModRegRM(rmXMM, rmXMM, V4FLOATT);
3030  return makeInstruction(x86_movntps, "movntps", modrm, reg);
3031  case mmF3:
3032  getModRegRM(rmXMM, rmXMM, FLOATT);
3033  return makeInstruction(x86_movntss, "movntss", modrm, reg);
3034  case mm66:
3035  getModRegRM(rmXMM, rmXMM, V2DOUBLET);
3036  return makeInstruction(x86_movntpd, "movntpd", modrm, reg);
3037  case mmF2:
3038  getModRegRM(rmXMM, rmXMM, DOUBLET);
3039  return makeInstruction(x86_movntsd, "movntsd", modrm, reg);
3040  }
3041  }
3042  case 0x2C: {
3043  switch (mmPrefix()) {
3044  case mmNone:
3045  getModRegRM(rmMM, rmXMM, V4FLOATT, V2DWORDT);
3046  return makeInstruction(x86_cvttps2pi, "cvttps2pi", reg, modrm);
3047  case mmF3:
3048  getModRegRM(effectiveOperandMode(), rmXMM, FLOATT, effectiveOperandType());
3049  return makeInstruction(x86_cvttss2si, "cvttss2si", reg, modrm);
3050  case mm66:
3051  getModRegRM(rmMM, rmXMM, V2DOUBLET, V2DWORDT);
3052  return makeInstruction(x86_cvttpd2pi, "cvttpd2pi", reg, modrm);
3053  case mmF2:
3054  getModRegRM(effectiveOperandMode(), rmXMM, DOUBLET, effectiveOperandType());
3055  return makeInstruction(x86_cvttsd2si, "cvttsd2si", reg, modrm);
3056  }
3057  }
3058  case 0x2D: {
3059  switch (mmPrefix()) {
3060  case mmNone:
3061  getModRegRM(rmMM, rmXMM, V4FLOATT, V2DWORDT);
3062  return makeInstruction(x86_cvtps2pi, "cvtps2pi", reg, modrm);
3063  case mmF3:
3064  getModRegRM(effectiveOperandMode(), rmXMM, V4FLOATT, effectiveOperandType());
3065  return makeInstruction(x86_cvtss2si, "cvtss2si", reg, modrm);
3066  case mm66:
3067  getModRegRM(rmMM, rmXMM, V2DOUBLET, V2DWORDT);
3068  return makeInstruction(x86_cvtpd2pi, "cvtpd2pi", reg, modrm);
3069  case mmF2:
3070  getModRegRM(effectiveOperandMode(), rmXMM, V2DOUBLET, effectiveOperandType());
3071  return makeInstruction(x86_cvtsd2si, "cvtsd2si", reg, modrm);
3072  }
3073  }
3074  case 0x2E: {
3075  switch (mmPrefix()) {
3076  case mmNone:
3077  getModRegRM(rmXMM, rmXMM, FLOATT);
3078  return makeInstruction(x86_ucomiss, "ucomiss", reg, modrm);
3079  case mmF3:
3080  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f2e", this);
3081  case mm66:
3082  getModRegRM(rmXMM, rmXMM, DOUBLET);
3083  return makeInstruction(x86_ucomisd, "ucomisd", reg, modrm);
3084  case mmF2:
3085  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f2e", this);
3086  }
3087  }
3088  case 0x2F: {
3089  switch (mmPrefix()) {
3090  case mmNone:
3091  getModRegRM(rmXMM, rmXMM, FLOATT);
3092  return makeInstruction(x86_comiss, "comiss", reg, modrm);
3093  case mmF3:
3094  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f2f", this);
3095  case mm66:
3096  getModRegRM(rmXMM, rmXMM, DOUBLET);
3097  return makeInstruction(x86_comisd, "comisd", reg, modrm);
3098  case mmF2:
3099  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f2f", this);
3100  }
3101  }
3102  case 0x30:
3103  return makeInstruction(x86_wrmsr, "wrmsr");
3104  case 0x31:
3105  return makeInstruction(x86_rdtsc, "rdtsc");
3106  case 0x32:
3107  return makeInstruction(x86_rdmsr, "rdmsr");
3108  case 0x33:
3109  return makeInstruction(x86_rdpmc, "rdpmc");
3110  case 0x34:
3111  not64();
3112  return makeInstruction(x86_sysenter, "sysenter");
3113  case 0x35:
3114  not64();
3115  return makeInstruction(x86_sysexit, "sysexit");
3116  case 0x36:
3117  throw ExceptionX86("bad opcode 0x0f36", this);
3118  case 0x37:
3119  return makeInstruction(x86_getsec, "getsec");
3120  case 0x38:
3121  decodeOpcode0F38(); /*SSSE3*/
3122  case 0x39:
3123  throw ExceptionX86("bad opcode 0x0f39", this);
3124  case 0x3A: {
3125  /* more SSE3? should this be in a decodeOpcode0F3A() instead? */
3126  uint8_t thirdOpcodeByte = getByte();
3127  switch (thirdOpcodeByte) {
3128  case 0x0F: { /* palignr */
3129  SgAsmExpression* shiftAmount;
3130  switch (mmPrefix()) {
3131  /* Note that getModRegRM sets the states reg and modrm. Also, standard prefixed used in the manual,
3132  * "mm" refers to "mmx" registers and "xmm" refers to "sse" registers. */
3133  case mmNone:
3134  getModRegRM(rmMM, rmMM, QWORDT);
3135  shiftAmount = getImmByte();
3136  return makeInstruction(x86_palignr, "palignr", reg, modrm, shiftAmount);
3137  case mmF3:
3138  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f3a0f", this);
3139  case mm66:
3140  getModRegRM(rmXMM, rmXMM, DQWORDT);
3141  shiftAmount = getImmByte();
3142  return makeInstruction(x86_palignr, "palignr", reg, modrm, shiftAmount);
3143  case mmF2:
3144  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f3a0f", this);
3145  }
3146  }
3147  default: {
3148  char opcodestr[16];
3149  sprintf(opcodestr, "0x0f3a%02x", thirdOpcodeByte);
3150  throw ExceptionX86(std::string("bad or unimplemented opcode ")+opcodestr, this);
3151  }
3152  }
3153  }
3154  case 0x3B:
3155  throw ExceptionX86("bad opcode 0x0f3b", this);
3156  case 0x3C:
3157  throw ExceptionX86("bad opcode 0x0f3c", this);
3158  case 0x3D:
3159  throw ExceptionX86("bad opcode 0x0f3d", this);
3160  case 0x3E:
3161  throw ExceptionX86("bad opcode 0x0f3e", this);
3162  case 0x3F:
3163  throw ExceptionX86("bad opcode 0x0f3f", this);
3164  case 0x40:
3165  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
3166  return makeInstruction(x86_cmovo, "cmovo", reg, modrm);
3167  case 0x41:
3168  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
3169  return makeInstruction(x86_cmovno, "cmovno", reg, modrm);
3170  case 0x42:
3171  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
3172  return makeInstruction(x86_cmovb, "cmovb", reg, modrm);
3173  case 0x43:
3174  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
3175  return makeInstruction(x86_cmovae, "cmovae", reg, modrm);
3176  case 0x44:
3177  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
3178  return makeInstruction(x86_cmove, "cmove", reg, modrm);
3179  case 0x45:
3180  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
3181  return makeInstruction(x86_cmovne, "cmovne", reg, modrm);
3182  case 0x46:
3183  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
3184  return makeInstruction(x86_cmovbe, "cmovbe", reg, modrm);
3185  case 0x47:
3186  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
3187  return makeInstruction(x86_cmova, "cmova", reg, modrm);
3188  case 0x48:
3189  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
3190  return makeInstruction(x86_cmovs, "cmovs", reg, modrm);
3191  case 0x49:
3192  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
3193  return makeInstruction(x86_cmovns, "cmovns", reg, modrm);
3194  case 0x4A:
3195  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
3196  return makeInstruction(x86_cmovpe, "cmovpe", reg, modrm);
3197  case 0x4B:
3198  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
3199  return makeInstruction(x86_cmovpo, "cmovpo", reg, modrm);
3200  case 0x4C:
3201  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
3202  return makeInstruction(x86_cmovl, "cmovl", reg, modrm);
3203  case 0x4D:
3204  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
3205  return makeInstruction(x86_cmovge, "cmovge", reg, modrm);
3206  case 0x4E:
3207  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
3208  return makeInstruction(x86_cmovle, "cmovle", reg, modrm);
3209  case 0x4F:
3210  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
3211  return makeInstruction(x86_cmovg, "cmovg", reg, modrm);
3212  case 0x50: {
3213  switch (mmPrefix()) {
3214  case mmNone:
3215  getModRegRM(rmDWord, rmXMM, V4FLOATT);
3216  if (modeField == 3) {
3217  return makeInstruction(x86_movmskps, "movmskps", reg, modrm);
3218  } else {
3219  throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f50", this);
3220  }
3221  case mmF3:
3222  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f50", this);
3223  case mm66:
3224  getModRegRM(rmDWord, rmXMM, V2DOUBLET);
3225  if (modeField == 3) {
3226  return makeInstruction(x86_movmskpd, "movmskpd", reg, modrm);
3227  } else {
3228  throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f50", this);
3229  }
3230  case mmF2:
3231  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f50", this);
3232  }
3233  }
3234  case 0x51: {
3235  switch (mmPrefix()) {
3236  case mmNone:
3237  getModRegRM(rmXMM, rmXMM, V4FLOATT);
3238  return makeInstruction(x86_sqrtps, "sqrtps", reg, modrm);
3239  case mmF3:
3240  getModRegRM(rmXMM, rmXMM, FLOATT);
3241  return makeInstruction(x86_sqrtss, "sqrtss", reg, modrm);
3242  case mm66:
3243  getModRegRM(rmXMM, rmXMM, V2DOUBLET);
3244  return makeInstruction(x86_sqrtpd, "sqrtpd", reg, modrm);
3245  case mmF2:
3246  getModRegRM(rmXMM, rmXMM, DOUBLET);
3247  return makeInstruction(x86_sqrtsd, "sqrtsd", reg, modrm);
3248  }
3249  }
3250  case 0x52: {
3251  switch (mmPrefix()) {
3252  case mmNone:
3253  getModRegRM(rmXMM, rmXMM, V4FLOATT);
3254  return makeInstruction(x86_rsqrtps, "rsqrtps", reg, modrm);
3255  case mmF3:
3256  getModRegRM(rmXMM, rmXMM, FLOATT);
3257  return makeInstruction(x86_rsqrtss, "rsqrtss", reg, modrm);
3258  case mm66:
3259  throw ExceptionX86("bad mm prefix 66 for opcode 0x0f52", this);
3260  case mmF2:
3261  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f52", this);
3262  }
3263  }
3264  case 0x53: {
3265  switch (mmPrefix()) {
3266  case mmNone:
3267  getModRegRM(rmXMM, rmXMM, V4FLOATT);
3268  return makeInstruction(x86_rcpps, "rcpps", reg, modrm);
3269  case mmF3:
3270  getModRegRM(rmXMM, rmXMM, FLOATT);
3271  return makeInstruction(x86_rcpss, "rcpss", reg, modrm);
3272  case mm66:
3273  throw ExceptionX86("bad mm prefix 66 for opcode 0x0f53", this);
3274  case mmF2:
3275  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f53", this);
3276  }
3277  }
3278  case 0x54: {
3279  switch (mmPrefix()) {
3280  case mmNone:
3281  getModRegRM(rmXMM, rmXMM, V4FLOATT);
3282  return makeInstruction(x86_andps, "andps", reg, modrm);
3283  case mmF3:
3284  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f54", this);
3285  case mm66:
3286  getModRegRM(rmXMM, rmXMM, V4FLOATT);
3287  return makeInstruction(x86_andpd, "andpd", reg, modrm);
3288  case mmF2:
3289  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f54", this);
3290  }
3291  }
3292  case 0x55: {
3293  switch (mmPrefix()) {
3294  case mmNone:
3295  getModRegRM(rmXMM, rmXMM, V4FLOATT);
3296  return makeInstruction(x86_andnps, "andnps", reg, modrm);
3297  case mmF3:
3298  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f55", this);
3299  case mm66:
3300  getModRegRM(rmXMM, rmXMM, V2DOUBLET);
3301  return makeInstruction(x86_andnpd, "andnpd", reg, modrm);
3302  case mmF2:
3303  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f55", this);
3304  }
3305  }
3306  case 0x56: {
3307  switch (mmPrefix()) {
3308  case mmNone:
3309  getModRegRM(rmXMM, rmXMM, V4FLOATT);
3310  return makeInstruction(x86_orps, "orps", reg, modrm);
3311  case mmF3:
3312  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f56", this);
3313  case mm66:
3314  getModRegRM(rmXMM, rmXMM, V2DOUBLET);
3315  return makeInstruction(x86_orpd, "orpd", reg, modrm);
3316  case mmF2:
3317  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f56", this);
3318  }
3319  }
3320  case 0x57: {
3321  switch (mmPrefix()) {
3322  case mmNone:
3323  getModRegRM(rmXMM, rmXMM, V4FLOATT);
3324  return makeInstruction(x86_xorps, "xorps", reg, modrm);
3325  case mmF3:
3326  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f57", this);
3327  case mm66:
3328  getModRegRM(rmXMM, rmXMM, V2DOUBLET);
3329  return makeInstruction(x86_xorpd, "xorpd", reg, modrm);
3330  case mmF2:
3331  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f57", this);
3332  }
3333  }
3334  case 0x58: {
3335  switch (mmPrefix()) {
3336  case mmNone:
3337  getModRegRM(rmXMM, rmXMM, V4FLOATT);
3338  return makeInstruction(x86_addps, "addps", reg, modrm);
3339  case mmF3:
3340  getModRegRM(rmXMM, rmXMM, FLOATT);
3341  return makeInstruction(x86_addss, "addss", reg, modrm);
3342  case mm66:
3343  getModRegRM(rmXMM, rmXMM, V2DOUBLET);
3344  return makeInstruction(x86_addpd, "addpd", reg, modrm);
3345  case mmF2:
3346  getModRegRM(rmXMM, rmXMM, DOUBLET);
3347  return makeInstruction(x86_addsd, "addsd", reg, modrm);
3348  }
3349  }
3350  case 0x59: {
3351  switch (mmPrefix()) {
3352  case mmNone:
3353  getModRegRM(rmXMM, rmXMM, V4FLOATT);
3354  return makeInstruction(x86_mulps, "mulps", reg, modrm);
3355  case mmF3:
3356  getModRegRM(rmXMM, rmXMM, FLOATT);
3357  return makeInstruction(x86_mulss, "mulss", reg, modrm);
3358  case mm66:
3359  getModRegRM(rmXMM, rmXMM, V2DOUBLET);
3360  return makeInstruction(x86_mulpd, "mulpd", reg, modrm);
3361  case mmF2:
3362  getModRegRM(rmXMM, rmXMM, DOUBLET);
3363  return makeInstruction(x86_mulsd, "mulsd", reg, modrm);
3364  }
3365  }
3366  case 0x5A: {
3367  switch (mmPrefix()) {
3368  case mmNone:
3369  getModRegRM(rmXMM, rmXMM, V4FLOATT, V2DOUBLET);
3370  return makeInstruction(x86_cvtps2pd, "cvtps2pd", reg, modrm);
3371  case mmF3:
3372  getModRegRM(rmXMM, rmXMM, FLOATT, V2DOUBLET);
3373  return makeInstruction(x86_cvtss2sd, "cvtss2sd", reg, modrm);
3374  case mm66:
3375  getModRegRM(rmXMM, rmXMM, V2DOUBLET, V4FLOATT);
3376  return makeInstruction(x86_cvtpd2ps, "cvtpd2ps", reg, modrm);
3377  case mmF2:
3378  getModRegRM(rmXMM, rmXMM, DOUBLET, V4FLOATT);
3379  return makeInstruction(x86_cvtsd2ss, "cvtsd2ss", reg, modrm);
3380  }
3381  }
3382  case 0x5B: {
3383  switch (mmPrefix()) {
3384  case mmNone:
3385  getModRegRM(rmXMM, rmXMM, V4DWORDT, V4FLOATT);
3386  return makeInstruction(x86_cvtdq2ps, "cvtdq2ps", reg, modrm);
3387  case mmF3:
3388  getModRegRM(rmXMM, rmXMM, V4FLOATT, V4DWORDT);
3389  return makeInstruction(x86_cvttps2dq, "cvttps2dq", reg, modrm);
3390  case mm66:
3391  getModRegRM(rmXMM, rmXMM, V4FLOATT, V4DWORDT);
3392  return makeInstruction(x86_cvtps2dq, "cvtps2dq", reg, modrm);
3393  case mmF2:
3394  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f5b", this);
3395  }
3396  }
3397  case 0x5C: {
3398  switch (mmPrefix()) {
3399  case mmNone:
3400  getModRegRM(rmXMM, rmXMM, V4FLOATT);
3401  return makeInstruction(x86_subps, "subps", reg, modrm);
3402  case mmF3:
3403  getModRegRM(rmXMM, rmXMM, FLOATT);
3404  return makeInstruction(x86_subss, "subss", reg, modrm);
3405  case mm66:
3406  getModRegRM(rmXMM, rmXMM, V2DOUBLET);
3407  return makeInstruction(x86_subpd, "subpd", reg, modrm);
3408  case mmF2:
3409  getModRegRM(rmXMM, rmXMM, DOUBLET);
3410  return makeInstruction(x86_subsd, "subsd", reg, modrm);
3411  }
3412  }
3413  case 0x5D: {
3414  switch (mmPrefix()) {
3415  case mmNone:
3416  getModRegRM(rmXMM, rmXMM, V4FLOATT);
3417  return makeInstruction(x86_minps, "minps", reg, modrm);
3418  case mmF3:
3419  getModRegRM(rmXMM, rmXMM, FLOATT);
3420  return makeInstruction(x86_minss, "minss", reg, modrm);
3421  case mm66:
3422  getModRegRM(rmXMM, rmXMM, V2DOUBLET);
3423  return makeInstruction(x86_minpd, "minpd", reg, modrm);
3424  case mmF2:
3425  getModRegRM(rmXMM, rmXMM, DOUBLET);
3426  return makeInstruction(x86_minsd, "minsd", reg, modrm);
3427  }
3428  }
3429  case 0x5E: {
3430  switch (mmPrefix()) {
3431  case mmNone:
3432  getModRegRM(rmXMM, rmXMM, V4FLOATT);
3433  return makeInstruction(x86_divps, "divps", reg, modrm);
3434  case mmF3:
3435  getModRegRM(rmXMM, rmXMM, FLOATT);
3436  return makeInstruction(x86_divss, "divss", reg, modrm);
3437  case mm66:
3438  getModRegRM(rmXMM, rmXMM, V2DOUBLET);
3439  return makeInstruction(x86_divpd, "divpd", reg, modrm);
3440  case mmF2:
3441  getModRegRM(rmXMM, rmXMM, DOUBLET);
3442  return makeInstruction(x86_divsd, "divsd", reg, modrm);
3443  }
3444  }
3445  case 0x5F: {
3446  switch (mmPrefix()) {
3447  case mmNone:
3448  getModRegRM(rmXMM, rmXMM, V4FLOATT);
3449  return makeInstruction(x86_maxps, "maxps", reg, modrm);
3450  case mmF3:
3451  getModRegRM(rmXMM, rmXMM, FLOATT);
3452  return makeInstruction(x86_maxss, "maxss", reg, modrm);
3453  case mm66:
3454  getModRegRM(rmXMM, rmXMM, V2DOUBLET);
3455  return makeInstruction(x86_maxpd, "maxpd", reg, modrm);
3456  case mmF2:
3457  getModRegRM(rmXMM, rmXMM, DOUBLET);
3458  return makeInstruction(x86_maxsd, "maxsd", reg, modrm);
3459  }
3460  }
3461  case 0x60: {
3462  switch (mmPrefix()) {
3463  case mmNone:
3464  getModRegRM(rmMM, rmMM, V8BYTET, V4WORDT);
3465  return makeInstruction(x86_punpcklbw, "punpcklbw", reg, modrm);
3466  case mmF3:
3467  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f60", this);
3468  case mm66:
3469  getModRegRM(rmXMM, rmXMM, V16BYTET, V8WORDT);
3470  return makeInstruction(x86_punpcklbw, "punpcklbw", reg, modrm);
3471  case mmF2:
3472  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f60", this);
3473  }
3474  }
3475  case 0x61: {
3476  switch (mmPrefix()) {
3477  case mmNone:
3478  getModRegRM(rmMM, rmMM, V4WORDT, V2DWORDT);
3479  return makeInstruction(x86_punpcklwd, "punpcklwd", reg, modrm);
3480  case mmF3:
3481  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f61", this);
3482  case mm66:
3483  getModRegRM(rmXMM, rmXMM, V8WORDT, V4DWORDT);
3484  return makeInstruction(x86_punpcklwd, "punpcklwd", reg, modrm);
3485  case mmF2:
3486  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f61", this);
3487  }
3488  }
3489  case 0x62: {
3490  switch (mmPrefix()) {
3491  case mmNone:
3492  getModRegRM(rmMM, rmMM, V2DWORDT, QWORDT);
3493  return makeInstruction(x86_punpckldq, "punpckldq", reg, modrm);
3494  case mmF3:
3495  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f62", this);
3496  case mm66:
3497  getModRegRM(rmXMM, rmXMM, V4DWORDT, V2QWORDT);
3498  return makeInstruction(x86_punpckldq, "punpckldq", reg, modrm);
3499  case mmF2:
3500  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f62", this);
3501  }
3502  }
3503  case 0x63: {
3504  switch (mmPrefix()) {
3505  case mmNone:
3506  getModRegRM(rmMM, rmMM, V4WORDT, V8BYTET);
3507  return makeInstruction(x86_packsswb, "packsswb", reg, modrm);
3508  case mmF3:
3509  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f63", this);
3510  case mm66:
3511  getModRegRM(rmXMM, rmXMM, V8WORDT, V16BYTET);
3512  return makeInstruction(x86_packsswb, "packsswb", reg, modrm);
3513  case mmF2:
3514  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f63", this);
3515  }
3516  }
3517  case 0x64: {
3518  switch (mmPrefix()) {
3519  case mmNone:
3520  getModRegRM(rmMM, rmMM, V8BYTET);
3521  return makeInstruction(x86_pcmpgtb, "pcmpgtb", reg, modrm);
3522  case mmF3:
3523  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f64", this);
3524  case mm66:
3525  getModRegRM(rmXMM, rmXMM, V16BYTET);
3526  return makeInstruction(x86_pcmpgtb, "pcmpgtb", reg, modrm);
3527  case mmF2:
3528  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f64", this);
3529  }
3530  }
3531  case 0x65: {
3532  switch (mmPrefix()) {
3533  case mmNone:
3534  getModRegRM(rmMM, rmMM, V4WORDT);
3535  return makeInstruction(x86_pcmpgtw, "pcmpgtw", reg, modrm);
3536  case mmF3:
3537  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f65", this);
3538  case mm66:
3539  getModRegRM(rmXMM, rmXMM, V8WORDT);
3540  return makeInstruction(x86_pcmpgtw, "pcmpgtw", reg, modrm);
3541  case mmF2:
3542  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f65", this);
3543  }
3544  }
3545  case 0x66: {
3546  switch (mmPrefix()) {
3547  case mmNone:
3548  getModRegRM(rmMM, rmMM, V2DWORDT);
3549  return makeInstruction(x86_pcmpgtd, "pcmpgtd", reg, modrm);
3550  case mmF3:
3551  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f66", this);
3552  case mm66:
3553  getModRegRM(rmXMM, rmXMM, V4DWORDT);
3554  return makeInstruction(x86_pcmpgtd, "pcmpgtd", reg, modrm);
3555  case mmF2:
3556  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f66", this);
3557  }
3558  }
3559  case 0x67: {
3560  switch (mmPrefix()) {
3561  case mmNone:
3562  getModRegRM(rmMM, rmMM, V4WORDT, V8BYTET);
3563  return makeInstruction(x86_packuswb, "packuswb", reg, modrm);
3564  case mmF3:
3565  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f67", this);
3566  case mm66:
3567  getModRegRM(rmXMM, rmXMM, V8WORDT, V16BYTET);
3568  return makeInstruction(x86_packuswb, "packuswb", reg, modrm);
3569  case mmF2:
3570  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f67", this);
3571  }
3572  }
3573  case 0x68: {
3574  switch (mmPrefix()) {
3575  case mmNone:
3576  getModRegRM(rmMM, rmMM, V8BYTET, V4WORDT);
3577  return makeInstruction(x86_punpckhbw, "punpckhbw", reg, modrm);
3578  case mmF3:
3579  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f68", this);
3580  case mm66:
3581  getModRegRM(rmXMM, rmXMM, V16BYTET, V8WORDT);
3582  return makeInstruction(x86_punpckhbw, "punpckhbw", reg, modrm);
3583  case mmF2:
3584  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f68", this);
3585  }
3586  }
3587  case 0x69: {
3588  switch (mmPrefix()) {
3589  case mmNone:
3590  getModRegRM(rmMM, rmMM, V4WORDT, V2DWORDT);
3591  return makeInstruction(x86_punpckhwd, "punpckhwd", reg, modrm);
3592  case mmF3:
3593  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f69", this);
3594  case mm66:
3595  getModRegRM(rmXMM, rmXMM, V8WORDT, V4DWORDT);
3596  return makeInstruction(x86_punpckhwd, "punpckhwd", reg, modrm);
3597  case mmF2:
3598  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f69", this);
3599  }
3600  }
3601  case 0x6A: {
3602  switch (mmPrefix()) {
3603  case mmNone:
3604  getModRegRM(rmMM, rmMM, V2DWORDT, QWORDT);
3605  return makeInstruction(x86_punpckhdq, "punpckhdq", reg, modrm);
3606  case mmF3:
3607  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f6a", this);
3608  case mm66:
3609  getModRegRM(rmXMM, rmXMM, V4DWORDT, V2QWORDT);
3610  return makeInstruction(x86_punpckhdq, "punpckhdq", reg, modrm);
3611  case mmF2:
3612  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f6a", this);
3613  }
3614  }
3615  case 0x6B: {
3616  switch (mmPrefix()) {
3617  case mmNone:
3618  getModRegRM(rmMM, rmMM, V2DWORDT, V4WORDT);
3619  return makeInstruction(x86_packssdw, "packssdw", reg, modrm);
3620  case mmF3:
3621  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f6b", this);
3622  case mm66:
3623  getModRegRM(rmXMM, rmXMM, V4DWORDT, V8WORDT);
3624  return makeInstruction(x86_packssdw, "packssdw", reg, modrm);
3625  case mmF2:
3626  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f6b", this);
3627  }
3628  }
3629  case 0x6C: {
3630  switch (mmPrefix()) {
3631  case mmNone:
3632  throw ExceptionX86("bad mm prefix None for opcode 0x0f6c", this);
3633  case mmF3:
3634  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f6c", this);
3635  case mm66:
3636  getModRegRM(rmXMM, rmXMM, V2QWORDT, DQWORDT);
3637  return makeInstruction(x86_punpcklqdq, "punpcklqdq", reg, modrm);
3638  case mmF2:
3639  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f6c", this);
3640  }
3641  }
3642  case 0x6D: {
3643  switch (mmPrefix()) {
3644  case mmNone:
3645  throw ExceptionX86("bad mm prefix None for opcode 0x0f6d", this);
3646  case mmF3:
3647  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f6d", this);
3648  case mm66:
3649  getModRegRM(rmXMM, rmXMM, V2QWORDT, DQWORDT);
3650  return makeInstruction(x86_punpckhqdq, "punpckhqdq", reg, modrm);
3651  case mmF2:
3652  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f6d", this);
3653  }
3654  }
3655  case 0x6E: {
3656  switch (mmPrefix()) {
3657  case mmNone:
3658  if (effectiveOperandSize()==x86_insnsize_64) {
3659  getModRegRM(rmMM, effectiveOperandMode(), effectiveOperandType(), QWORDT);
3660  return makeInstruction(x86_movq, "movq", reg, modrm);
3661  } else {
3662  getModRegRM(rmMM, effectiveOperandMode(), effectiveOperandType(), V2DWORDT);
3663  return makeInstruction(x86_movd, "movd", reg, modrm);
3664  }
3665  case mmF3:
3666  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f6e", this);
3667  case mm66:
3668  /* 0x66 is part of the opcode rather than an operand size override and used to distinguish between mm and
3669  * xmm registers. The operands are 32 bits unless the REX.W bit is set, in which case they're 64 bits. */
3670  operandSizeOverride = false;
3671  if (effectiveOperandSize()==x86_insnsize_64) {
3672  getModRegRM(rmXMM, effectiveOperandMode(), effectiveOperandType(), V2QWORDT);
3673  return makeInstruction(x86_movq, "movq", reg, modrm);
3674  } else {
3675  getModRegRM(rmXMM, effectiveOperandMode(), effectiveOperandType(), V4DWORDT);
3676  return makeInstruction(x86_movd, "movd", reg, modrm);
3677  }
3678  case mmF2:
3679  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f6e", this);
3680  }
3681  }
3682  case 0x6F: {
3683  switch (mmPrefix()) {
3684  case mmNone:
3685  getModRegRM(rmMM, rmMM, QWORDT);
3686  return makeInstruction(x86_movq, "movq", reg, modrm);
3687  case mmF3:
3688  getModRegRM(rmXMM, rmXMM, DQWORDT);
3689  return makeInstruction(x86_movdqu, "movdqu", reg, modrm);
3690  case mm66:
3691  getModRegRM(rmXMM, rmXMM, DQWORDT);
3692  return makeInstruction(x86_movdqa, "movdqa", reg, modrm);
3693  case mmF2:
3694  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f6f", this);
3695  }
3696  }
3697  case 0x70: {
3698  switch (mmPrefix()) {
3699  case mmNone: {
3700  getModRegRM(rmMM, rmMM, V4WORDT);
3701  SgAsmExpression* shufConstant = getImmByte();
3702  return makeInstruction(x86_pshufw, "pshufw", reg, modrm, shufConstant);
3703  }
3704  case mmF3: {
3705  getModRegRM(rmXMM, rmXMM, V8WORDT);
3706  SgAsmExpression* shufConstant = getImmByte();
3707  return makeInstruction(x86_pshufhw, "pshufhw", reg, modrm, shufConstant);
3708  }
3709  case mm66: {
3710  getModRegRM(rmXMM, rmXMM, V4DWORDT);
3711  SgAsmExpression* shufConstant = getImmByte();
3712  return makeInstruction(x86_pshufd, "pshufd", reg, modrm, shufConstant);
3713  }
3714  case mmF2: {
3715  getModRegRM(rmXMM, rmXMM, V8WORDT);
3716  SgAsmExpression* shufConstant = getImmByte();
3717  return makeInstruction(x86_pshuflw, "pshuflw", reg, modrm, shufConstant);
3718  }
3719  }
3720  }
3721  case 0x71: {
3722  /* Group 12 */
3723  switch (mmPrefix()) {
3724  case mmNone: {
3725  getModRegRM(rmReturnNull, rmMM, V4WORDT);
3726  if (modeField != 3)
3727  throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f71", this);
3728  SgAsmExpression* shiftAmount = getImmByte();
3729  switch (regField) {
3730  case 0: throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f71", this);
3731  case 1: throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f71", this);
3732  case 2: return makeInstruction(x86_psrlw, "psrlw", modrm, shiftAmount);
3733  case 3: throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f71", this);
3734  case 4: return makeInstruction(x86_psraw, "psraw", modrm, shiftAmount);
3735  case 5: throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f71", this);
3736  case 6: return makeInstruction(x86_psllw, "psllw", modrm, shiftAmount);
3737  case 7: throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f71", this);
3738  default: ROSE_ASSERT(false);
3739  }
3740  }
3741  case mmF3:
3742  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f71", this);
3743  case mm66: {
3744  getModRegRM(rmReturnNull, rmXMM, V8WORDT);
3745  if (modeField != 3)
3746  throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f71", this);
3747  SgAsmExpression* shiftAmount = getImmByte();
3748  switch (regField) {
3749  case 0: throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f71", this);
3750  case 1: throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f71", this);
3751  case 2: return makeInstruction(x86_psrlw, "psrlw", modrm, shiftAmount);
3752  case 3: throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f71", this);
3753  case 4: return makeInstruction(x86_psraw, "psraw", modrm, shiftAmount);
3754  case 5: throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f71", this);
3755  case 6: return makeInstruction(x86_psllw, "psllw", modrm, shiftAmount);
3756  case 7: throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f71", this);
3757  default: ROSE_ASSERT(false);
3758  }
3759  }
3760  case mmF2:
3761  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f71", this);
3762  }
3763  }
3764  case 0x72: {
3765  /* Group 13 */
3766  switch (mmPrefix()) {
3767  case mmNone: {
3768  getModRegRM(rmReturnNull, rmMM, V2DWORDT);
3769  if (modeField != 3)
3770  throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f72", this);
3771  SgAsmExpression* shiftAmount = getImmByte();
3772  switch (regField) {
3773  case 0: throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f72", this);
3774  case 1: throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f72", this);
3775  case 2: return makeInstruction(x86_psrld, "psrld", modrm, shiftAmount);
3776  case 3: throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f72", this);
3777  case 4: return makeInstruction(x86_psrad, "psrad", modrm, shiftAmount);
3778  case 5: throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f72", this);
3779  case 6: return makeInstruction(x86_pslld, "pslld", modrm, shiftAmount);
3780  case 7: throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f72", this);
3781  default: ROSE_ASSERT(false);
3782  }
3783  }
3784  case mmF3:
3785  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f72", this);
3786  case mm66: {
3787  getModRegRM(rmReturnNull, rmXMM, V4DWORDT);
3788  if (modeField != 3)
3789  throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f72", this);
3790  SgAsmExpression* shiftAmount = getImmByte();
3791  switch (regField) {
3792  case 0: throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f72", this);
3793  case 1: throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f72", this);
3794  case 2: return makeInstruction(x86_psrld, "psrld", modrm, shiftAmount);
3795  case 3: throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f72", this);
3796  case 4: return makeInstruction(x86_psrad, "psrad", modrm, shiftAmount);
3797  case 5: throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f72", this);
3798  case 6: return makeInstruction(x86_pslld, "pslld", modrm, shiftAmount);
3799  case 7: throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f72", this);
3800  default: ROSE_ASSERT(false);
3801  }
3802  }
3803  case mmF2:
3804  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f72", this);
3805  }
3806  }
3807  case 0x73: {
3808  /* Group 14 */
3809  switch (mmPrefix()) {
3810  case mmNone: {
3811  getModRegRM(rmReturnNull, rmMM, QWORDT);
3812  if (modeField != 3)
3813  throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f73", this);
3814  SgAsmExpression* shiftAmount = getImmByte();
3815  switch (regField) {
3816  case 0: throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f73", this);
3817  case 1: throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f73", this);
3818  case 2: return makeInstruction(x86_psrlq, "psrlq", modrm, shiftAmount);
3819  case 3: throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f73", this);
3820  case 4: return makeInstruction(x86_psraq, "psraq", modrm, shiftAmount);
3821  case 5: throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f73", this);
3822  case 6: return makeInstruction(x86_psllq, "psllq", modrm, shiftAmount);
3823  case 7: throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f73", this);
3824  default: ROSE_ASSERT(false);
3825  }
3826  }
3827  case mmF3:
3828  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f73", this);
3829  case mm66: {
3830  getModRegRM(rmReturnNull, rmXMM, V2QWORDT);
3831  if (modeField != 3)
3832  throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f73", this);
3833  SgAsmExpression* shiftAmount = getImmByte();
3834  switch (regField) {
3835  case 0:
3836  throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f73", this);
3837  case 1:
3838  throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f73", this);
3839  case 2:
3840  return makeInstruction(x86_psrlq, "psrlq", modrm, shiftAmount);
3841  case 3:
3842  isSgAsmx86RegisterReferenceExpression(modrm)->set_type(DQWORDT);
3843  return makeInstruction(x86_psrldq, "psrldq", modrm, shiftAmount);
3844  case 4:
3845  throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f73", this);
3846  case 5:
3847  throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f73", this);
3848  case 6:
3849  return makeInstruction(x86_psllq, "psllq", modrm, shiftAmount);
3850  case 7:
3851  isSgAsmx86RegisterReferenceExpression(modrm)->set_type(DQWORDT);
3852  return makeInstruction(x86_pslldq, "pslldq", modrm, shiftAmount);
3853  default:
3854  ROSE_ASSERT(false);
3855  }
3856  }
3857  case mmF2:
3858  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f73", this);
3859  }
3860  }
3861  case 0x74: {
3862  switch (mmPrefix()) {
3863  case mmNone:
3864  getModRegRM(rmMM, rmMM, V8BYTET);
3865  return makeInstruction(x86_pcmpeqb, "pcmpeqb", reg, modrm);
3866  case mmF3:
3867  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f74", this);
3868  case mm66:
3869  getModRegRM(rmXMM, rmXMM, V16BYTET);
3870  return makeInstruction(x86_pcmpeqb, "pcmpeqb", reg, modrm);
3871  case mmF2:
3872  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f74", this);
3873  }
3874  }
3875  case 0x75: {
3876  switch (mmPrefix()) {
3877  case mmNone:
3878  getModRegRM(rmMM, rmMM, V4WORDT);
3879  return makeInstruction(x86_pcmpeqw, "pcmpeqw", reg, modrm);
3880  case mmF3:
3881  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f75", this);
3882  case mm66:
3883  getModRegRM(rmXMM, rmXMM, V8WORDT);
3884  return makeInstruction(x86_pcmpeqw, "pcmpeqw", reg, modrm);
3885  case mmF2:
3886  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f75", this);
3887  }
3888  }
3889  case 0x76: {
3890  switch (mmPrefix()) {
3891  case mmNone:
3892  getModRegRM(rmMM, rmMM, V2DWORDT);
3893  return makeInstruction(x86_pcmpeqd, "pcmpeqd", reg, modrm);
3894  case mmF3:
3895  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f76", this);
3896  case mm66:
3897  getModRegRM(rmXMM, rmXMM, V4DWORDT);
3898  return makeInstruction(x86_pcmpeqd, "pcmpeqd", reg, modrm);
3899  case mmF2:
3900  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f76", this);
3901  }
3902  }
3903  case 0x77: {
3904  switch (mmPrefix()) {
3905  case mmNone:
3906  return makeInstruction(x86_emms, "emms");
3907  case mmF3:
3908  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f77", this);
3909  case mm66:
3910  throw ExceptionX86("bad mm prefix 66 for opcode 0x0f77", this);
3911  case mmF2:
3912  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f77", this);
3913  }
3914  }
3915  case 0x78: {
3916  switch (mmPrefix()) {
3917  case mmNone:
3918  throw ExceptionX86("vmread not supported", this);
3919  case mmF3:
3920  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f78", this);
3921  case mm66: {
3922  /* Group 17 */
3923  getModRegRM(rmReturnNull, rmXMM, DQWORDT);
3924  SgAsmExpression* imm1 = getImmByte();
3925  SgAsmExpression* imm2 = getImmByte();
3926  switch (regField) {
3927  case 0:
3928  if (modeField == 3) {
3929  return makeInstruction(x86_extrq, "extrq", modrm, imm1, imm2);
3930  } else {
3931  throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f78", this);
3932  }
3933  default:
3934  throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f78", this);
3935  }
3936  }
3937  case mmF2: {
3938  getModRegRM(rmXMM, rmXMM, QWORDT, DQWORDT);
3939  SgAsmExpression* imm1 = getImmByte();
3940  SgAsmExpression* imm2 = getImmByte();
3941  if (modeField == 3) {
3942  return makeInstruction(x86_insertq, "insertq", reg, modrm, imm1, imm2);
3943  } else {
3944  throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f78", this);
3945  }
3946  }
3947  }
3948  }
3949  case 0x79: {
3950  switch (mmPrefix()) {
3951  case mmNone:
3952  throw ExceptionX86("vmwrite not supported", this);
3953  case mmF3:
3954  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f79", this);
3955  case mm66:
3956  getModRegRM(rmXMM, rmXMM, QWORDT, DQWORDT);
3957  if (modeField == 3) {
3958  return makeInstruction(x86_extrq, "extrq", reg, modrm);
3959  } else {
3960  throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f79", this);
3961  }
3962  case mmF2:
3963  getModRegRM(rmXMM, rmXMM, DQWORDT);
3964  if (modeField == 3) {
3965  return makeInstruction(x86_insertq, "insertq", reg, modrm);
3966  } else {
3967  throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0f79", this);
3968  }
3969  }
3970  }
3971  case 0x7A:
3972  throw ExceptionX86("bad opcode 0x0f7a", this);
3973  case 0x7B:
3974  throw ExceptionX86("bad opcode 0x0f7b", this);
3975  case 0x7C: {
3976  switch (mmPrefix()) {
3977  case mmNone:
3978  throw ExceptionX86("bad mm prefix None for opcode 0x0f7c", this);
3979  case mmF3:
3980  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f7c", this);
3981  case mm66:
3982  getModRegRM(rmXMM, rmXMM, V2DOUBLET);
3983  return makeInstruction(x86_haddpd, "haddpd", reg, modrm);
3984  case mmF2:
3985  getModRegRM(rmXMM, rmXMM, V4FLOATT);
3986  return makeInstruction(x86_haddps, "haddps", reg, modrm);
3987  }
3988  }
3989  case 0x7D: {
3990  switch (mmPrefix()) {
3991  case mmNone:
3992  throw ExceptionX86("bad mm prefix None for opcode 0x0f7d", this);
3993  case mmF3:
3994  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f7d", this);
3995  case mm66:
3996  getModRegRM(rmXMM, rmXMM, V2DOUBLET);
3997  return makeInstruction(x86_hsubpd, "hsubpd", reg, modrm);
3998  case mmF2:
3999  getModRegRM(rmXMM, rmXMM, V4FLOATT);
4000  return makeInstruction(x86_hsubps, "hsubps", reg, modrm);
4001  }
4002  }
4003  case 0x7E: {
4004  switch (mmPrefix()) {
4005  case mmNone:
4006  if (effectiveOperandSize()==x86_insnsize_64) {
4007  getModRegRM(rmMM, effectiveOperandMode(), effectiveOperandType(), QWORDT);
4008  return makeInstruction(x86_movq, "movq", modrm, reg);
4009  } else {
4010  getModRegRM(rmMM, effectiveOperandMode(), effectiveOperandType(), V2DWORDT);
4011  return makeInstruction(x86_movd, "movd", modrm, reg);
4012  }
4013  case mmF3:
4014  getModRegRM(rmXMM, rmXMM, V2QWORDT);
4015  return makeInstruction(x86_movq, "movq", reg, modrm);
4016  case mm66:
4017  /* 0x66 is part of the opcode rather than an operand size override and used to distinguish between mm and
4018  * xmm registers. The operands are 32 bits unless the REX.W bit is set, in which case they're 64 bits. */
4019  operandSizeOverride = false;
4020  if (effectiveOperandSize()==x86_insnsize_64) {
4021  getModRegRM(rmXMM, effectiveOperandMode(), effectiveOperandType(), V2QWORDT);
4022  return makeInstruction(x86_movq, "movq", modrm, reg);
4023  } else {
4024  getModRegRM(rmXMM, effectiveOperandMode(), effectiveOperandType(), V4DWORDT);
4025  return makeInstruction(x86_movd, "movd", modrm, reg);
4026  }
4027 
4028  case mmF2:
4029  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f7e", this);
4030  }
4031  }
4032  case 0x7F: {
4033  switch (mmPrefix()) {
4034  case mmNone:
4035  getModRegRM(rmMM, rmMM, QWORDT);
4036  return makeInstruction(x86_movq, "movq", modrm, reg);
4037  case mmF3:
4038  getModRegRM(rmXMM, rmXMM, DQWORDT);
4039  return makeInstruction(x86_movdqu, "movdqu", modrm, reg);
4040  case mm66:
4041  getModRegRM(rmXMM, rmXMM, DQWORDT);
4042  return makeInstruction(x86_movdqa, "movdqa", modrm, reg);
4043  case mmF2:
4044  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f7f", this);
4045  }
4046  }
4047  case 0x80: {
4048  SgAsmExpression* imm = getImmJz();
4049  branchPredictionEnabled = true;
4050  return makeInstruction(x86_jo, "jo", imm);
4051  }
4052  case 0x81: {
4053  SgAsmExpression* imm = getImmJz();
4054  branchPredictionEnabled = true;
4055  return makeInstruction(x86_jno, "jno", imm);
4056  }
4057  case 0x82: {
4058  SgAsmExpression* imm = getImmJz();
4059  branchPredictionEnabled = true;
4060  return makeInstruction(x86_jb, "jb", imm);
4061  }
4062  case 0x83: {
4063  SgAsmExpression* imm = getImmJz();
4064  branchPredictionEnabled = true;
4065  return makeInstruction(x86_jae, "jae", imm);
4066  }
4067  case 0x84: {
4068  SgAsmExpression* imm = getImmJz();
4069  branchPredictionEnabled = true;
4070  return makeInstruction(x86_je, "je", imm);
4071  }
4072  case 0x85: {
4073  SgAsmExpression* imm = getImmJz();
4074  branchPredictionEnabled = true;
4075  return makeInstruction(x86_jne, "jne", imm);
4076  }
4077  case 0x86: {
4078  SgAsmExpression* imm = getImmJz();
4079  branchPredictionEnabled = true;
4080  return makeInstruction(x86_jbe, "jbe", imm);
4081  }
4082  case 0x87: {
4083  SgAsmExpression* imm = getImmJz();
4084  branchPredictionEnabled = true;
4085  return makeInstruction(x86_ja, "ja", imm);
4086  }
4087  case 0x88: {
4088  SgAsmExpression* imm = getImmJz();
4089  branchPredictionEnabled = true;
4090  return makeInstruction(x86_js, "js", imm);
4091  }
4092  case 0x89: {
4093  SgAsmExpression* imm = getImmJz();
4094  branchPredictionEnabled = true;
4095  return makeInstruction(x86_jns, "jns", imm);
4096  }
4097  case 0x8A: {
4098  SgAsmExpression* imm = getImmJz();
4099  branchPredictionEnabled = true;
4100  return makeInstruction(x86_jpe, "jpe", imm);
4101  }
4102  case 0x8B: {
4103  SgAsmExpression* imm = getImmJz();
4104  branchPredictionEnabled = true;
4105  return makeInstruction(x86_jpo, "jpo", imm);
4106  }
4107  case 0x8C: {
4108  SgAsmExpression* imm = getImmJz();
4109  branchPredictionEnabled = true;
4110  return makeInstruction(x86_jl, "jl", imm);
4111  }
4112  case 0x8D: {
4113  SgAsmExpression* imm = getImmJz();
4114  branchPredictionEnabled = true;
4115  return makeInstruction(x86_jge, "jge", imm);
4116  }
4117  case 0x8E: {
4118  SgAsmExpression* imm = getImmJz();
4119  branchPredictionEnabled = true;
4120  return makeInstruction(x86_jle, "jle", imm);
4121  }
4122  case 0x8F: {
4123  SgAsmExpression* imm = getImmJz();
4124  branchPredictionEnabled = true;
4125  return makeInstruction(x86_jg, "jg", imm);
4126  }
4127  case 0x90:
4128  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
4129  return makeInstruction(x86_seto, "seto", modrm);
4130  case 0x91:
4131  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
4132  return makeInstruction(x86_setno, "setno", modrm);
4133  case 0x92:
4134  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
4135  return makeInstruction(x86_setb, "setb", modrm);
4136  case 0x93:
4137  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
4138  return makeInstruction(x86_setae, "setae", modrm);
4139  case 0x94:
4140  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
4141  return makeInstruction(x86_sete, "sete", modrm);
4142  case 0x95:
4143  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
4144  return makeInstruction(x86_setne, "setne", modrm);
4145  case 0x96:
4146  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
4147  return makeInstruction(x86_setbe, "setbe", modrm);
4148  case 0x97:
4149  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
4150  return makeInstruction(x86_seta, "seta", modrm);
4151  case 0x98:
4152  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
4153  return makeInstruction(x86_sets, "sets", modrm);
4154  case 0x99:
4155  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
4156  return makeInstruction(x86_setns, "setns", modrm);
4157  case 0x9A:
4158  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
4159  return makeInstruction(x86_setpe, "setpe", modrm);
4160  case 0x9B:
4161  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
4162  return makeInstruction(x86_setpo, "setpo", modrm);
4163  case 0x9C:
4164  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
4165  return makeInstruction(x86_setl, "setl", modrm);
4166  case 0x9D:
4167  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
4168  return makeInstruction(x86_setge, "setge", modrm);
4169  case 0x9E:
4170  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
4171  return makeInstruction(x86_setle, "setle", modrm);
4172  case 0x9F:
4173  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
4174  return makeInstruction(x86_setg, "setg", modrm);
4175  case 0xA0:
4176  return makeInstruction(x86_push, "push", makeRegister(4, rmSegment));
4177  case 0xA1:
4178  return makeInstruction(x86_pop, "pop", makeRegister(4, rmSegment));
4179  case 0xA2:
4180  return makeInstruction(x86_cpuid, "cpuid");
4181  case 0xA3:
4182  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
4183  return makeInstruction(x86_bt, "bt", modrm, reg);
4184  case 0xA4:
4185  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
4186  return makeInstruction(x86_shld, "shld", modrm, reg, getImmByte());
4187  case 0xA5:
4188  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
4189  return makeInstruction(x86_shld, "shld", modrm, reg, makeRegister(1, rmLegacyByte));
4190  case 0xA6:
4191  throw ExceptionX86("bad opcode 0x0fa6", this);
4192  case 0xA7:
4193  throw ExceptionX86("bad opcode 0x0fa7", this);
4194  case 0xA8:
4195  return makeInstruction(x86_push, "push", makeRegister(5, rmSegment));
4196  case 0xA9:
4197  return makeInstruction(x86_pop, "pop", makeRegister(5, rmSegment));
4198  case 0xAA:
4199  return makeInstruction(x86_rsm, "rsm");
4200  case 0xAB:
4201  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
4202  return makeInstruction(x86_btr, "btr", modrm, reg);
4203  case 0xAC:
4204  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
4205  return makeInstruction(x86_shrd, "shrd", modrm, reg, getImmByte());
4206  case 0xAD:
4207  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
4208  return makeInstruction(x86_shrd, "shrd", modrm, reg, makeRegister(1, rmLegacyByte));
4209  case 0xAE:
4210  return decodeGroup15();
4211  case 0xAF:
4212  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
4213  return makeInstruction(x86_imul, "imul", reg, modrm);
4214  case 0xB0:
4215  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
4216  return makeInstruction(x86_cmpxchg, "cmpxchg", modrm, reg);
4217  case 0xB1:
4218  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
4219  return makeInstruction(x86_cmpxchg, "cmpxchg", modrm, reg);
4220  case 0xB2:
4221  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
4222  requireMemory();
4223  return makeInstruction(x86_lss, "lss", reg, modrm);
4224  case 0xB3:
4225  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
4226  return makeInstruction(x86_bts, "bts", modrm, reg);
4227  case 0xB4:
4228  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
4229  requireMemory();
4230  return makeInstruction(x86_lfs, "lfs", reg, modrm);
4231  case 0xB5:
4232  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
4233  requireMemory();
4234  return makeInstruction(x86_lgs, "lgs", reg, modrm);
4235  case 0xB6:
4236  getModRegRM(effectiveOperandMode(), rmLegacyByte, BYTET);
4237  return makeInstruction(x86_movzx, "movzx", reg, modrm);
4238  case 0xB7:
4239  getModRegRM(effectiveOperandMode(), rmWord, WORDT);
4240  return makeInstruction(x86_movzx, "movzx", reg, modrm);
4241  case 0xB8: {
4242  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
4243  /* Here is an example of the existence of a prefix leading to two very different instructions. */
4244  switch (mmPrefix()) {
4245  case mmNone:
4246  isUnconditionalJump = true;
4247  return makeInstruction(x86_jmpe, "jmpe", modrm);
4248  case mmF3:
4249  return makeInstruction(x86_popcnt, "popcnt", reg, modrm);
4250  default:
4251  throw ExceptionX86("bad mm prefix for opcode 0x0fb8", this);
4252  }
4253  }
4254  case 0xB9:
4255  throw ExceptionX86("bad opcode 0x0fb9", this);
4256  case 0xBA:
4257  getModRegRM(rmReturnNull, effectiveOperandMode(), effectiveOperandType());
4258  return decodeGroup8(getImmByte());
4259  case 0xBB:
4260  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
4261  return makeInstruction(x86_btc, "btc", modrm, reg);
4262  case 0xBC:
4263  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
4264  return makeInstruction(x86_bsf, "bsf", reg, modrm);
4265  case 0xBD:
4266  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
4267  if (repeatPrefix == x86_repeat_repe) return makeInstruction(x86_lzcnt, "lzcnt", reg, modrm);
4268  else return makeInstruction(x86_bsr, "bsr", reg, modrm);
4269  case 0xBE:
4270  getModRegRM(effectiveOperandMode(), rmLegacyByte, BYTET);
4271  return makeInstruction(x86_movsx, "movsx", reg, modrm);
4272  case 0xBF:
4273  getModRegRM(effectiveOperandMode(), rmWord, WORDT);
4274  return makeInstruction(x86_movsx, "movsx", reg, modrm);
4275  case 0xC0:
4276  getModRegRM(rmLegacyByte, rmLegacyByte, BYTET);
4277  return makeInstruction(x86_xadd, "xadd", modrm, reg);
4278  case 0xC1:
4279  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
4280  return makeInstruction(x86_xadd, "xadd", modrm, reg);
4281  case 0xC2: {
4282  switch (mmPrefix()) {
4283  case mmNone:
4284  getModRegRM(rmXMM, rmXMM, V4FLOATT);
4285  return makeInstruction(x86_cmpps, "cmpps", reg, modrm, getImmByte());
4286  case mmF3:
4287  getModRegRM(rmXMM, rmXMM, FLOATT);
4288  return makeInstruction(x86_cmpss, "cmpss", reg, modrm, getImmByte());
4289  case mm66:
4290  getModRegRM(rmXMM, rmXMM, V2DOUBLET);
4291  return makeInstruction(x86_cmppd, "cmppd", reg, modrm, getImmByte());
4292  case mmF2:
4293  getModRegRM(rmXMM, rmXMM, DOUBLET);
4294  return makeInstruction(x86_cmpsd, "cmpsd", reg, modrm, getImmByte());
4295  }
4296  }
4297  case 0xC3: {
4298  switch (mmPrefix()) {
4299  case mmNone:
4300  getModRegRM(effectiveOperandMode(), effectiveOperandMode(), effectiveOperandType());
4301  requireMemory();
4302  return makeInstruction(x86_movnti, "movnti", modrm, reg);
4303  case mmF3:
4304  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fc3", this);
4305  case mm66:
4306  throw ExceptionX86("bad mm prefix 66 for opcode 0x0fc3", this);
4307  case mmF2:
4308  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fc3", this);
4309  }
4310  }
4311  case 0xC4: {
4312  switch (mmPrefix()) {
4313  case mmNone: {
4314  getModRegRM(rmMM, rmWord, WORDT, QWORDT);
4315  SgAsmExpression* imm = getImmByte();
4316  return makeInstruction(x86_pinsrw, "pinsrw", reg, modrm, imm);
4317  }
4318  case mmF3:
4319  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fc4", this);
4320  case mm66: {
4321  getModRegRM(rmXMM, rmWord, WORDT, DQWORDT);
4322  SgAsmExpression* imm = getImmByte();
4323  return makeInstruction(x86_pinsrw, "pinsrw", reg, modrm, imm);
4324  }
4325  case mmF2:
4326  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fc4", this);
4327  }
4328  }
4329  case 0xC5: {
4330  switch (mmPrefix()) {
4331  case mmNone: {
4332  getModRegRM(rmDWord, rmMM, V4WORDT, DWORDT);
4333  SgAsmExpression* imm = getImmByte();
4334  if (modeField == 3) {
4335  return makeInstruction(x86_pextrw, "pextrw", reg, modrm, imm);
4336  } else {
4337  throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0fc5", this);
4338  }
4339  }
4340  case mmF3:
4341  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fc5", this);
4342  case mm66: {
4343  getModRegRM(rmDWord, rmXMM, V8WORDT, DWORDT);
4344  SgAsmExpression* imm = getImmByte();
4345  if (modeField == 3) {
4346  return makeInstruction(x86_pextrw, "pextrw", reg, modrm, imm);
4347  } else {
4348  throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0fc5", this);
4349  }
4350  }
4351  case mmF2:
4352  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fc5", this);
4353  }
4354  }
4355  case 0xC6: {
4356  switch (mmPrefix()) {
4357  case mmNone: {
4358  getModRegRM(rmXMM, rmXMM, V4FLOATT);
4359  SgAsmExpression* shufConstant = getImmByte();
4360  return makeInstruction(x86_shufps, "shufps", reg, modrm, shufConstant);
4361  }
4362  case mmF3:
4363  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fc6", this);
4364  case mm66: {
4365  getModRegRM(rmXMM, rmXMM, V2DOUBLET);
4366  SgAsmExpression* shufConstant = getImmByte();
4367  return makeInstruction(x86_shufpd, "shufpd", reg, modrm, shufConstant);
4368  }
4369  case mmF2:
4370  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fc6", this);
4371  }
4372  }
4373  case 0xC7: {
4374  /* Group 9 */
4375  getModRegRM(rmReturnNull, rmReturnNull, NULL);
4376  requireMemory();
4377  switch (regField) {
4378  case 1: {
4379  if (effectiveOperandSize() == x86_insnsize_64) {
4380  fillInModRM(rmReturnNull, DQWORDT);
4381  return makeInstruction(x86_cmpxchg16b, "cmpxchg16b", modrm);
4382  } else {
4383  fillInModRM(rmReturnNull, QWORDT);
4384  return makeInstruction(x86_cmpxchg8b, "cmpxchg8b", modrm);
4385  }
4386  }
4387  case 6: {
4388  fillInModRM(rmReturnNull, QWORDT);
4389  switch (mmPrefix()) {
4390  case mmNone: return makeInstruction(x86_vmptrld, "vmptrld", modrm);
4391  case mmF3: return makeInstruction(x86_vmxon, "vmxon", modrm);
4392  case mm66: return makeInstruction(x86_vmclear, "vmclear", modrm);
4393  default: throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0fc7", this);
4394  }
4395  }
4396  case 7: {
4397  fillInModRM(rmReturnNull, QWORDT);
4398  return makeInstruction(x86_vmptrst, "vmptrst", modrm);
4399  }
4400  default:
4401  throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0fc7", this);
4402  }
4403  }
4404  case 0xC8:
4405  return makeInstruction(x86_bswap, "bswap", makeRegisterEffective(rexB, 0));
4406  case 0xC9:
4407  return makeInstruction(x86_bswap, "bswap", makeRegisterEffective(rexB, 1));
4408  case 0xCA:
4409  return makeInstruction(x86_bswap, "bswap", makeRegisterEffective(rexB, 2));
4410  case 0xCB:
4411  return makeInstruction(x86_bswap, "bswap", makeRegisterEffective(rexB, 3));
4412  case 0xCC:
4413  return makeInstruction(x86_bswap, "bswap", makeRegisterEffective(rexB, 4));
4414  case 0xCD:
4415  return makeInstruction(x86_bswap, "bswap", makeRegisterEffective(rexB, 5));
4416  case 0xCE:
4417  return makeInstruction(x86_bswap, "bswap", makeRegisterEffective(rexB, 6));
4418  case 0xCF:
4419  return makeInstruction(x86_bswap, "bswap", makeRegisterEffective(rexB, 7));
4420  case 0xD0: {
4421  switch (mmPrefix()) {
4422  case mmNone:
4423  throw ExceptionX86("bad mm prefix None for opcode 0x0fd0", this);
4424  case mmF3:
4425  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fd0", this);
4426  case mm66:
4427  getModRegRM(rmXMM, rmXMM, V2DOUBLET);
4428  return makeInstruction(x86_addsubpd, "addsubpd", reg, modrm);
4429  case mmF2:
4430  getModRegRM(rmXMM, rmXMM, V4FLOATT);
4431  return makeInstruction(x86_addsubps, "addsubps", reg, modrm);
4432  }
4433  }
4434  case 0xD1: {
4435  switch (mmPrefix()) {
4436  case mmNone:
4437  getModRegRM(rmMM, rmMM, V4WORDT);
4438  return makeInstruction(x86_psrlw, "psrlw", reg, modrm);
4439  case mmF3:
4440  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fd1", this);
4441  case mm66:
4442  getModRegRM(rmXMM, rmXMM, V8WORDT);
4443  return makeInstruction(x86_psrlw, "psrlw", reg, modrm);
4444  case mmF2:
4445  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fd1", this);
4446  }
4447  }
4448  case 0xD2: {
4449  switch (mmPrefix()) {
4450  case mmNone:
4451  getModRegRM(rmMM, rmMM, V2DWORDT);
4452  return makeInstruction(x86_psrld, "psrld", reg, modrm);
4453  case mmF3:
4454  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fd2", this);
4455  case mm66:
4456  getModRegRM(rmXMM, rmXMM, V4DWORDT);
4457  return makeInstruction(x86_psrld, "psrld", reg, modrm);
4458  case mmF2:
4459  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fd2", this);
4460  }
4461  }
4462  case 0xD3: {
4463  switch (mmPrefix()) {
4464  case mmNone:
4465  getModRegRM(rmMM, rmMM, QWORDT);
4466  return makeInstruction(x86_psrlq, "psrlq", reg, modrm);
4467  case mmF3:
4468  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fd3", this);
4469  case mm66:
4470  getModRegRM(rmXMM, rmXMM, V2QWORDT);
4471  return makeInstruction(x86_psrlq, "psrlq", reg, modrm);
4472  case mmF2:
4473  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fd3", this);
4474  }
4475  }
4476  case 0xD4: {
4477  switch (mmPrefix()) {
4478  case mmNone:
4479  getModRegRM(rmMM, rmMM, QWORDT);
4480  return makeInstruction(x86_paddq, "paddq", reg, modrm);
4481  case mmF3:
4482  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fd4", this);
4483  case mm66:
4484  getModRegRM(rmXMM, rmXMM, V2QWORDT);
4485  return makeInstruction(x86_paddq, "paddq", reg, modrm);
4486  case mmF2:
4487  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fd4", this);
4488  }
4489  }
4490  case 0xD5: {
4491  switch (mmPrefix()) {
4492  case mmNone:
4493  getModRegRM(rmMM, rmMM, V4WORDT);
4494  return makeInstruction(x86_pmullw, "pmullw", reg, modrm);
4495  case mmF3:
4496  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fd5", this);
4497  case mm66:
4498  getModRegRM(rmXMM, rmXMM, V8WORDT);
4499  return makeInstruction(x86_pmullw, "pmullw", reg, modrm);
4500  case mmF2:
4501  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fd5", this);
4502  }
4503  }
4504  case 0xD6: {
4505  switch (mmPrefix()) {
4506  case mmNone:
4507  throw ExceptionX86("bad mm prefix None for opcode 0x0fd6", this);
4508  case mmF3:
4509  getModRegRM(rmMM, rmXMM, QWORDT, DQWORDT);
4510  if (modeField == 3) {
4511  return makeInstruction(x86_movq2dq, "movq2dq", reg, modrm);
4512  } else {
4513  throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0fd6", this);
4514  }
4515  case mm66:
4516  getModRegRM(rmXMM, rmXMM, QWORDT);
4517  return makeInstruction(x86_movq, "movq", modrm, reg);
4518  case mmF2:
4519  getModRegRM(rmXMM, rmMM, DQWORDT, QWORDT);
4520  if (modeField == 3) {
4521  return makeInstruction(x86_movdq2q, "movdq2q", reg, modrm);
4522  } else {
4523  throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0fd6", this);
4524  }
4525  }
4526  }
4527  case 0xD7: {
4528  switch (mmPrefix()) {
4529  case mmNone:
4530  getModRegRM(rmDWord, rmMM, V8BYTET, DWORDT);
4531  if (modeField == 3) {
4532  return makeInstruction(x86_pmovmskb, "pmovmskb", reg, modrm);
4533  } else {
4534  throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0fd7", this);
4535  }
4536  case mmF3:
4537  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fd7", this);
4538  case mm66:
4539  getModRegRM(rmDWord, rmXMM, V16BYTET, DWORDT);
4540  if (modeField == 3) {
4541  return makeInstruction(x86_pmovmskb, "pmovmskb", reg, modrm);
4542  } else {
4543  throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0fd7", this);
4544  }
4545  case mmF2:
4546  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fd7", this);
4547  }
4548  }
4549  case 0xD8: {
4550  switch (mmPrefix()) {
4551  case mmNone:
4552  getModRegRM(rmMM, rmMM, V8BYTET);
4553  return makeInstruction(x86_psubusb, "psubusb", reg, modrm);
4554  case mmF3:
4555  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fd8", this);
4556  case mm66:
4557  getModRegRM(rmXMM, rmXMM, V16BYTET);
4558  return makeInstruction(x86_psubusb, "psubusb", reg, modrm);
4559  case mmF2:
4560  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fd8", this);
4561  }
4562  }
4563  case 0xD9: {
4564  switch (mmPrefix()) {
4565  case mmNone:
4566  getModRegRM(rmMM, rmMM, V4WORDT);
4567  return makeInstruction(x86_psubusw, "psubusw", reg, modrm);
4568  case mmF3:
4569  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fd9", this);
4570  case mm66:
4571  getModRegRM(rmXMM, rmXMM, V8WORDT);
4572  return makeInstruction(x86_psubusw, "psubusw", reg, modrm);
4573  case mmF2:
4574  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fd9", this);
4575  }
4576  }
4577  case 0xDA: {
4578  switch (mmPrefix()) {
4579  case mmNone:
4580  getModRegRM(rmMM, rmMM, V8BYTET);
4581  return makeInstruction(x86_pminub, "pminub", reg, modrm);
4582  case mmF3:
4583  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fda", this);
4584  case mm66:
4585  getModRegRM(rmXMM, rmXMM, V16BYTET);
4586  return makeInstruction(x86_pminub, "pminub", reg, modrm);
4587  case mmF2:
4588  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fda", this);
4589  }
4590  }
4591  case 0xDB: {
4592  switch (mmPrefix()) {
4593  case mmNone:
4594  getModRegRM(rmMM, rmMM, QWORDT);
4595  return makeInstruction(x86_pand, "pand", reg, modrm);
4596  case mmF3:
4597  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fdb", this);
4598  case mm66:
4599  getModRegRM(rmXMM, rmXMM, DQWORDT);
4600  return makeInstruction(x86_pand, "pand", reg, modrm);
4601  case mmF2:
4602  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fdb", this);
4603  }
4604  }
4605  case 0xDC: {
4606  switch (mmPrefix()) {
4607  case mmNone:
4608  getModRegRM(rmMM, rmMM, V8BYTET);
4609  return makeInstruction(x86_paddusb, "paddusb", reg, modrm);
4610  case mmF3:
4611  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fdc", this);
4612  case mm66:
4613  getModRegRM(rmXMM, rmXMM, V16BYTET);
4614  return makeInstruction(x86_paddusb, "paddusb", reg, modrm);
4615  case mmF2:
4616  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fdc", this);
4617  }
4618  }
4619  case 0xDD: {
4620  switch (mmPrefix()) {
4621  case mmNone:
4622  getModRegRM(rmMM, rmMM, V4WORDT);
4623  return makeInstruction(x86_paddusw, "paddusw", reg, modrm);
4624  case mmF3:
4625  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fdd", this);
4626  case mm66:
4627  getModRegRM(rmXMM, rmXMM, V8WORDT);
4628  return makeInstruction(x86_paddusw, "paddusw", reg, modrm);
4629  case mmF2:
4630  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fdd", this);
4631  }
4632  }
4633  case 0xDE: {
4634  switch (mmPrefix()) {
4635  case mmNone:
4636  getModRegRM(rmMM, rmMM, V8BYTET);
4637  return makeInstruction(x86_pmaxub, "pmaxub", reg, modrm);
4638  case mmF3:
4639  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fde", this);
4640  case mm66:
4641  getModRegRM(rmXMM, rmXMM, V16BYTET);
4642  return makeInstruction(x86_pmaxub, "pmaxub", reg, modrm);
4643  case mmF2:
4644  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fde", this);
4645  }
4646  }
4647  case 0xDF: {
4648  switch (mmPrefix()) {
4649  case mmNone:
4650  getModRegRM(rmMM, rmMM, QWORDT);
4651  return makeInstruction(x86_pandn, "pandn", reg, modrm);
4652  case mmF3:
4653  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fdf", this);
4654  case mm66:
4655  getModRegRM(rmXMM, rmXMM, DQWORDT);
4656  return makeInstruction(x86_pandn, "pandn", reg, modrm);
4657  case mmF2:
4658  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fdf", this);
4659  }
4660  }
4661  case 0xE0: {
4662  switch (mmPrefix()) {
4663  case mmNone:
4664  getModRegRM(rmMM, rmMM, V8BYTET);
4665  return makeInstruction(x86_pavgb, "pavgb", reg, modrm);
4666  case mmF3:
4667  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fe0", this);
4668  case mm66:
4669  getModRegRM(rmXMM, rmXMM, V16BYTET);
4670  return makeInstruction(x86_pavgb, "pavgb", reg, modrm);
4671  case mmF2:
4672  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fe0", this);
4673  }
4674  }
4675  case 0xE1: {
4676  switch (mmPrefix()) {
4677  case mmNone:
4678  getModRegRM(rmMM, rmMM, V4WORDT);
4679  return makeInstruction(x86_psraw, "psraw", reg, modrm);
4680  case mmF3:
4681  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fe1", this);
4682  case mm66:
4683  getModRegRM(rmXMM, rmXMM, V8WORDT);
4684  return makeInstruction(x86_psraw, "psraw", reg, modrm);
4685  case mmF2:
4686  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fe1", this);
4687  }
4688  }
4689  case 0xE2: {
4690  switch (mmPrefix()) {
4691  case mmNone:
4692  getModRegRM(rmMM, rmMM, V2DWORDT);
4693  return makeInstruction(x86_psrad, "psrad", reg, modrm);
4694  case mmF3:
4695  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fe2", this);
4696  case mm66:
4697  getModRegRM(rmXMM, rmXMM, V4DWORDT);
4698  return makeInstruction(x86_psrad, "psrad", reg, modrm);
4699  case mmF2:
4700  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fe2", this);
4701  }
4702  }
4703  case 0xE3: {
4704  switch (mmPrefix()) {
4705  case mmNone:
4706  getModRegRM(rmMM, rmMM, V4WORDT);
4707  return makeInstruction(x86_pavgw, "pavgw", reg, modrm);
4708  case mmF3:
4709  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fe3", this);
4710  case mm66:
4711  getModRegRM(rmXMM, rmXMM, V8WORDT);
4712  return makeInstruction(x86_pavgw, "pavgw", reg, modrm);
4713  case mmF2:
4714  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fe3", this);
4715  }
4716  }
4717  case 0xE4: {
4718  switch (mmPrefix()) {
4719  case mmNone:
4720  getModRegRM(rmMM, rmMM, V4WORDT);
4721  return makeInstruction(x86_pmulhuw, "pmulhuw", reg, modrm);
4722  case mmF3:
4723  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fe4", this);
4724  case mm66:
4725  getModRegRM(rmXMM, rmXMM, V8WORDT);
4726  return makeInstruction(x86_pmulhuw, "pmulhuw", reg, modrm);
4727  case mmF2:
4728  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fe4", this);
4729  }
4730  }
4731  case 0xE5: {
4732  switch (mmPrefix()) {
4733  case mmNone:
4734  getModRegRM(rmMM, rmMM, V4WORDT);
4735  return makeInstruction(x86_pmulhw, "pmulhw", reg, modrm);
4736  case mmF3:
4737  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fe5", this);
4738  case mm66:
4739  getModRegRM(rmXMM, rmXMM, V8WORDT);
4740  return makeInstruction(x86_pmulhw, "pmulhw", reg, modrm);
4741  case mmF2:
4742  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fe5", this);
4743  }
4744  }
4745  case 0xE6: {
4746  switch (mmPrefix()) {
4747  case mmNone:
4748  throw ExceptionX86("bad mm prefix None for opcode 0x0fe6", this);
4749  case mmF3:
4750  getModRegRM(rmXMM, rmXMM, V2QWORDT, V2DOUBLET);
4751  return makeInstruction(x86_cvtdq2pd, "cvtdq2pd", reg, modrm);
4752  case mm66:
4753  getModRegRM(rmXMM, rmXMM, V2DOUBLET, V2QWORDT);
4754  return makeInstruction(x86_cvttpd2dq, "cvttpd2dq", reg, modrm);
4755  case mmF2:
4756  getModRegRM(rmXMM, rmXMM, V2DOUBLET, V2QWORDT);
4757  return makeInstruction(x86_cvtpd2dq, "cvtpd2dq", reg, modrm);
4758  }
4759  }
4760  case 0xE7: {
4761  switch (mmPrefix()) {
4762  case mmNone:
4763  getModRegRM(rmMM, rmMM, QWORDT);
4764  requireMemory();
4765  return makeInstruction(x86_movntq, "movntq", modrm, reg);
4766  case mmF3:
4767  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fe7", this);
4768  case mm66:
4769  getModRegRM(rmXMM, rmXMM, DQWORDT);
4770  requireMemory();
4771  return makeInstruction(x86_movntdq, "movntdq", modrm, reg);
4772  case mmF2:
4773  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fe7", this);
4774  }
4775  }
4776  case 0xE8: {
4777  switch (mmPrefix()) {
4778  case mmNone:
4779  getModRegRM(rmMM, rmMM, V8BYTET);
4780  return makeInstruction(x86_psubsb, "psubsb", reg, modrm);
4781  case mmF3:
4782  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fe8", this);
4783  case mm66:
4784  getModRegRM(rmXMM, rmXMM, V16BYTET);
4785  return makeInstruction(x86_psubsb, "psubsb", reg, modrm);
4786  case mmF2:
4787  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fe8", this);
4788  }
4789  }
4790  case 0xE9: {
4791  switch (mmPrefix()) {
4792  case mmNone:
4793  getModRegRM(rmMM, rmMM, V4WORDT);
4794  return makeInstruction(x86_psubsw, "psubsw", reg, modrm);
4795  case mmF3:
4796  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fe9", this);
4797  case mm66:
4798  getModRegRM(rmXMM, rmXMM, V8WORDT);
4799  return makeInstruction(x86_psubsw, "psubsw", reg, modrm);
4800  case mmF2:
4801  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fe9", this);
4802  }
4803  }
4804  case 0xEA: {
4805  switch (mmPrefix()) {
4806  case mmNone:
4807  getModRegRM(rmMM, rmMM, V4WORDT);
4808  return makeInstruction(x86_pminsw, "pminsw", reg, modrm);
4809  case mmF3:
4810  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fea", this);
4811  case mm66:
4812  getModRegRM(rmXMM, rmXMM, V8WORDT);
4813  return makeInstruction(x86_pminsw, "pminsw", reg, modrm);
4814  case mmF2:
4815  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fea", this);
4816  }
4817  }
4818  case 0xEB: {
4819  switch (mmPrefix()) {
4820  case mmNone:
4821  getModRegRM(rmMM, rmMM, QWORDT);
4822  return makeInstruction(x86_por, "por", reg, modrm);
4823  case mmF3:
4824  throw ExceptionX86("bad mm prefix F3 for opcode 0x0feb", this);
4825  case mm66:
4826  getModRegRM(rmXMM, rmXMM, DQWORDT);
4827  return makeInstruction(x86_por, "por", reg, modrm);
4828  case mmF2:
4829  throw ExceptionX86("bad mm prefix F2 for opcode 0x0feb", this);
4830  }
4831  }
4832  case 0xEC: {
4833  switch (mmPrefix()) {
4834  case mmNone:
4835  getModRegRM(rmMM, rmMM, V8BYTET);
4836  return makeInstruction(x86_paddsb, "paddsb", reg, modrm);
4837  case mmF3:
4838  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fec", this);
4839  case mm66:
4840  getModRegRM(rmXMM, rmXMM, V16BYTET);
4841  return makeInstruction(x86_paddsb, "paddsb", reg, modrm);
4842  case mmF2:
4843  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fec", this);
4844  }
4845  }
4846  case 0xED: {
4847  switch (mmPrefix()) {
4848  case mmNone:
4849  getModRegRM(rmMM, rmMM, V4WORDT);
4850  return makeInstruction(x86_paddsw, "paddsw", reg, modrm);
4851  case mmF3:
4852  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fed", this);
4853  case mm66:
4854  getModRegRM(rmXMM, rmXMM, V8WORDT);
4855  return makeInstruction(x86_paddsw, "paddsw", reg, modrm);
4856  case mmF2:
4857  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fed", this);
4858  }
4859  }
4860  case 0xEE: {
4861  switch (mmPrefix()) {
4862  case mmNone:
4863  getModRegRM(rmMM, rmMM, V4WORDT);
4864  return makeInstruction(x86_pmaxsw, "pmaxsw", reg, modrm);
4865  case mmF3:
4866  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fee", this);
4867  case mm66:
4868  getModRegRM(rmXMM, rmXMM, V8WORDT);
4869  return makeInstruction(x86_pmaxsw, "pmaxsw", reg, modrm);
4870  case mmF2:
4871  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fee", this);
4872  }
4873  }
4874  case 0xEF: {
4875  switch (mmPrefix()) {
4876  case mmNone:
4877  getModRegRM(rmMM, rmMM, QWORDT);
4878  return makeInstruction(x86_pxor, "pxor", reg, modrm);
4879  case mmF3:
4880  throw ExceptionX86("bad mm prefix F3 for opcode 0x0fef", this);
4881  case mm66:
4882  getModRegRM(rmXMM, rmXMM, DQWORDT);
4883  return makeInstruction(x86_pxor, "pxor", reg, modrm);
4884  case mmF2:
4885  throw ExceptionX86("bad mm prefix F2 for opcode 0x0fef", this);
4886  }
4887  }
4888  case 0xF0: {
4889  switch (mmPrefix()) {
4890  case mmNone:
4891  throw ExceptionX86("bad mm prefix None for opcode 0x0ff0", this);
4892  case mmF3:
4893  throw ExceptionX86("bad mm prefix F3 for opcode 0x0ff0", this);
4894  case mm66:
4895  throw ExceptionX86("bad mm prefix 66 for opcode 0x0ff0", this);
4896  case mmF2:
4897  getModRegRM(rmXMM, rmXMM, DQWORDT);
4898  requireMemory();
4899  return makeInstruction(x86_lddqu, "lddqu", reg, modrm);
4900  }
4901  }
4902  case 0xF1: {
4903  switch (mmPrefix()) {
4904  case mmNone:
4905  getModRegRM(rmMM, rmMM, V4WORDT);
4906  return makeInstruction(x86_psllw, "psllw", reg, modrm);
4907  case mmF3:
4908  throw ExceptionX86("bad mm prefix F3 for opcode 0x0ff1", this);
4909  case mm66:
4910  getModRegRM(rmXMM, rmXMM, V8WORDT);
4911  return makeInstruction(x86_psllw, "psllw", reg, modrm);
4912  case mmF2:
4913  throw ExceptionX86("bad mm prefix F2 for opcode 0x0ff1", this);
4914  }
4915  }
4916  case 0xF2: {
4917  switch (mmPrefix()) {
4918  case mmNone:
4919  getModRegRM(rmMM, rmMM, V2DWORDT);
4920  return makeInstruction(x86_pslld, "pslld", reg, modrm);
4921  case mmF3:
4922  throw ExceptionX86("bad mm prefix F3 for opcode 0x0ff2", this);
4923  case mm66:
4924  getModRegRM(rmXMM, rmXMM, V4DWORDT);
4925  return makeInstruction(x86_pslld, "pslld", reg, modrm);
4926  case mmF2:
4927  throw ExceptionX86("bad mm prefix F2 for opcode 0x0ff2", this);
4928  }
4929  }
4930  case 0xF3: {
4931  switch (mmPrefix()) {
4932  case mmNone:
4933  getModRegRM(rmMM, rmMM, QWORDT);
4934  return makeInstruction(x86_psllq, "psllq", reg, modrm);
4935  case mmF3:
4936  throw ExceptionX86("bad mm prefix F3 for opcode 0x0ff3", this);
4937  case mm66:
4938  getModRegRM(rmXMM, rmXMM, V2QWORDT);
4939  return makeInstruction(x86_psllq, "psllq", reg, modrm);
4940  case mmF2:
4941  throw ExceptionX86("bad mm prefix F2 for opcode 0x0ff3", this);
4942  }
4943  }
4944  case 0xF4: {
4945  switch (mmPrefix()) {
4946  case mmNone:
4947  getModRegRM(rmMM, rmMM, V2DWORDT, QWORDT);
4948  return makeInstruction(x86_pmuludq, "pmuludq", reg, modrm);
4949  case mmF3:
4950  throw ExceptionX86("bad mm prefix F3 for opcode 0x0ff4", this);
4951  case mm66:
4952  getModRegRM(rmXMM, rmXMM, V4DWORDT, V2QWORDT);
4953  return makeInstruction(x86_pmuludq, "pmuludq", reg, modrm);
4954  case mmF2:
4955  throw ExceptionX86("bad mm prefix F2 for opcode 0x0ff4", this);
4956  }
4957  }
4958  case 0xF5: {
4959  switch (mmPrefix()) {
4960  case mmNone:
4961  getModRegRM(rmMM, rmMM, V4WORDT, V2DWORDT);
4962  return makeInstruction(x86_pmaddwd, "pmaddwd", reg, modrm);
4963  case mmF3:
4964  throw ExceptionX86("bad mm prefix F3 for opcode 0x0ff5", this);
4965  case mm66:
4966  getModRegRM(rmXMM, rmXMM, V8WORDT, V4DWORDT);
4967  return makeInstruction(x86_pmaddwd, "pmaddwd", reg, modrm);
4968  case mmF2:
4969  throw ExceptionX86("bad mm prefix F2 for opcode 0x0ff5", this);
4970  }
4971  }
4972  case 0xF6: {
4973  switch (mmPrefix()) {
4974  case mmNone:
4975  getModRegRM(rmMM, rmMM, V8BYTET, V4WORDT);
4976  return makeInstruction(x86_psadbw, "psadbw", reg, modrm);
4977  case mmF3:
4978  throw ExceptionX86("bad mm prefix F3 for opcode 0x0ff6", this);
4979  case mm66:
4980  getModRegRM(rmXMM, rmXMM, V16BYTET, V8WORDT);
4981  return makeInstruction(x86_psadbw, "psadbw", reg, modrm);
4982  case mmF2:
4983  throw ExceptionX86("bad mm prefix F2 for opcode 0x0ff6", this);
4984  }
4985  }
4986  case 0xF7: {
4987  /* FIXME: The MOVNTQ and MOVNTDQ are at 0F E7 instead. This should be MASKMOVDQU. See Intel documentation.
4988  * [RPM 2009-07-02] */
4989  switch (mmPrefix()) {
4990  case mmNone:
4991  getModRegRM(rmMM, rmMM, QWORDT);
4992  if (modeField == 3) {
4993  return makeInstruction(x86_movntq, "movntq", reg, modrm);
4994  } else {
4995  throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0ff7", this);
4996  }
4997  case mmF3:
4998  throw ExceptionX86("bad mm prefix F3 for opcode 0x0ff7", this);
4999  case mm66:
5000  getModRegRM(rmXMM, rmXMM, DQWORDT);
5001  if (modeField == 3) {
5002  return makeInstruction(x86_movntdq, "movntdq", reg, modrm);
5003  } else {
5004  throw ExceptionX86("bad combination of mm prefix and ModR/M for opcode 0x0ff7", this);
5005  }
5006  case mmF2:
5007  throw ExceptionX86("bad mm prefix F2 for opcode 0x0ff7", this);
5008  }
5009  }
5010  case 0xF8: {
5011  switch (mmPrefix()) {
5012  case mmNone:
5013  getModRegRM(rmMM, rmMM, V8BYTET);
5014  return makeInstruction(x86_psubb, "psubb", reg, modrm);
5015  case mmF3:
5016  throw ExceptionX86("bad mm prefix F3 for opcode 0x0ff8", this);
5017  case mm66:
5018  getModRegRM(rmXMM, rmXMM, V16BYTET);
5019  return makeInstruction(x86_psubb, "psubb", reg, modrm);
5020  case mmF2:
5021  throw ExceptionX86("bad mm prefix F2 for opcode 0x0ff8", this);
5022  }
5023  }
5024  case 0xF9: {
5025  switch (mmPrefix()) {
5026  case mmNone:
5027  getModRegRM(rmMM, rmMM, V4WORDT);
5028  return makeInstruction(x86_psubw, "psubw", reg, modrm);
5029  case mmF3:
5030  throw ExceptionX86("bad mm prefix F3 for opcode 0x0ff9", this);
5031  case mm66:
5032  getModRegRM(rmXMM, rmXMM, V8WORDT);
5033  return makeInstruction(x86_psubw, "psubw", reg, modrm);
5034  case mmF2:
5035  throw ExceptionX86("bad mm prefix F2 for opcode 0x0ff9", this);
5036  }
5037  }
5038  case 0xFA: {
5039  switch (mmPrefix()) {
5040  case mmNone:
5041  getModRegRM(rmMM, rmMM, V2DWORDT);
5042  return makeInstruction(x86_psubd, "psubd", reg, modrm);
5043  case mmF3:
5044  throw ExceptionX86("bad mm prefix F3 for opcode 0x0ffa", this);
5045  case mm66:
5046  getModRegRM(rmXMM, rmXMM, V4DWORDT);
5047  return makeInstruction(x86_psubd, "psubd", reg, modrm);
5048  case mmF2:
5049  throw ExceptionX86("bad mm prefix F2 for opcode 0x0ffa", this);
5050  }
5051  }
5052  case 0xFB: {
5053  switch (mmPrefix()) {
5054  case mmNone:
5055  getModRegRM(rmMM, rmMM, QWORDT);
5056  return makeInstruction(x86_psubq, "psubq", reg, modrm);
5057  case mmF3:
5058  throw ExceptionX86("bad mm prefix F3 for opcode 0x0ffb", this);
5059  case mm66:
5060  getModRegRM(rmXMM, rmXMM, V2QWORDT);
5061  return makeInstruction(x86_psubq, "psubq", reg, modrm);
5062  case mmF2:
5063  throw ExceptionX86("bad mm prefix F2 for opcode 0x0ffb", this);
5064  }
5065  }
5066  case 0xFC: {
5067  switch (mmPrefix()) {
5068  case mmNone:
5069  getModRegRM(rmMM, rmMM, V8BYTET);
5070  return makeInstruction(x86_paddb, "paddb", reg, modrm);
5071  case mmF3:
5072  throw ExceptionX86("bad mm prefix F3 for opcode 0x0ffc", this);
5073  case mm66:
5074  getModRegRM(rmXMM, rmXMM, V16BYTET);
5075  return makeInstruction(x86_paddb, "paddb", reg, modrm);
5076  case mmF2:
5077  throw ExceptionX86("bad mm prefix F2 for opcode 0x0ffc", this);
5078  }
5079  }
5080  case 0xFD: {
5081  switch (mmPrefix()) {
5082  case mmNone:
5083  getModRegRM(rmMM, rmMM, V4WORDT);
5084  return makeInstruction(x86_paddw, "paddw", reg, modrm);
5085  case mmF3:
5086  throw ExceptionX86("bad mm prefix F3 for opcode 0x0ffd", this);
5087  case mm66:
5088  getModRegRM(rmXMM, rmXMM, V8WORDT);
5089  return makeInstruction(x86_paddw, "paddw", reg, modrm);
5090  case mmF2:
5091  throw ExceptionX86("bad mm prefix F2 for opcode 0x0ffd", this);
5092  }
5093  }
5094  case 0xFE: {
5095  switch (mmPrefix()) {
5096  case mmNone:
5097  getModRegRM(rmMM, rmMM, V2DWORDT);
5098  return makeInstruction(x86_paddd, "paddd", reg, modrm);
5099  case mmF3:
5100  throw ExceptionX86("bad mm prefix F3 for opcode 0x0ffe", this);
5101  case mm66:
5102  getModRegRM(rmXMM, rmXMM, V4DWORDT);
5103  return makeInstruction(x86_paddd, "paddd", reg, modrm);
5104  case mmF2:
5105  throw ExceptionX86("bad mm prefix F2 for opcode 0x0ffe", this);
5106  }
5107  }
5108  case 0xFF:
5109  throw ExceptionX86("bad opcode 0x0fff", this);
5110  default:
5111  ROSE_ASSERT(false);
5112  }
5113 
5114  // avoid MSCV warning by adding return stmt
5115  return NULL;
5116 }
5117 
5118 /* SSSE3 (opcode 0F38) */
5119 SgAsmx86Instruction *
5120 DisassemblerX86::decodeOpcode0F38()
5121 {
5122  // Get the third byte of the opcode (the first two were read by the caller (decodeOpcode0F())
5123  uint8_t opcode = getByte();
5124  switch (opcode) {
5125  case 0x00: {
5126  switch (mmPrefix()) {
5127  /* Note that getModRegRM sets the states reg and modrm. Also, standard prefixed used in the manual, "mm"
5128  * refers to "mmx" registers and "xmm" refers to "sse" registers. */
5129  case mmNone:
5130  getModRegRM(rmMM, rmMM, V2DWORDT);
5131  return makeInstruction(x86_pshufb, "pshufb", reg, modrm);
5132  case mmF3:
5133  throw ExceptionX86("bad mm prefix F3 for opcode 0x0f3800", this);
5134  case mm66:
5135  getModRegRM(rmXMM, rmXMM, V4DWORDT);
5136  return makeInstruction(x86_pshufb, "pshufb", reg, modrm);
5137  case mmF2:
5138  throw ExceptionX86("bad mm prefix F2 for opcode 0x0f3800", this);
5139  }
5140  }
5141  default:
5142  throw ExceptionX86("bad SSE3 opcode", this);
5143  }
5144 }
5145 
5146 SgAsmx86Instruction *
5147 DisassemblerX86::decodeX87InstructionD8()
5148 {
5149  getModRegRM(rmReturnNull, rmST, FLOATT);
5150  if (isSgAsmMemoryReferenceExpression(modrm)) {
5151  isSgAsmMemoryReferenceExpression(modrm)->set_type(FLOATT);
5152  }
5153  if (modregrmByte < 0xC0) { // Using memory
5154  switch (regField) {
5155  case 0: return makeInstruction(x86_fadd, "fadd", modrm);
5156  case 1: return makeInstruction(x86_fmul, "fmul", modrm);
5157  case 2: return makeInstruction(x86_fcom, "fcom", modrm);
5158  case 3: return makeInstruction(x86_fcomp, "fcomp", modrm);
5159  case 4: return makeInstruction(x86_fsub, "fsub", modrm);
5160  case 5: return makeInstruction(x86_fsubr, "fsubr", modrm);
5161  case 6: return makeInstruction(x86_fdiv, "fdiv", modrm);
5162  case 7: return makeInstruction(x86_fdivr, "fdivr", modrm);
5163  default: { ROSE_ASSERT(false); /* avoid MSCV warning by adding return stmt */ return NULL; }
5164  }
5165  } else { // Two-operand register forms
5166  switch (regField) {
5167  case 0: return makeInstruction(x86_fadd, "fadd", makeRegister(0, rmST), modrm);
5168  case 1: return makeInstruction(x86_fmul, "fmul", makeRegister(0, rmST), modrm);
5169  case 2: return makeInstruction(x86_fcom, "fcom", makeRegister(0, rmST), modrm);
5170  case 3: return makeInstruction(x86_fcomp, "fcomp", makeRegister(0, rmST), modrm);
5171  case 4: return makeInstruction(x86_fsub, "fsub", makeRegister(0, rmST), modrm);
5172  case 5: return makeInstruction(x86_fsubr, "fsubr", makeRegister(0, rmST), modrm);
5173  case 6: return makeInstruction(x86_fdiv, "fdiv", makeRegister(0, rmST), modrm);
5174  case 7: return makeInstruction(x86_fdivr, "fdivr", makeRegister(0, rmST), modrm);
5175  default: { ROSE_ASSERT(false); /* avoid MSCV warning by adding return stmt */ return NULL; }
5176  }
5177  }
5178 }
5179 
5180 SgAsmx86Instruction *
5181 DisassemblerX86::decodeX87InstructionD9()
5182 {
5183  getModRegRM(rmReturnNull, rmReturnNull, NULL);
5184  if (modeField < 3) {
5185  SgAsmMemoryReferenceExpression* mr = isSgAsmMemoryReferenceExpression(modrm);
5186  ROSE_ASSERT(mr);
5187  switch (regField) {
5188  case 0:
5189  mr->set_type(FLOATT);
5190  return makeInstruction(x86_fld, "fld", modrm);
5191  case 1:
5192  throw ExceptionX86("bad ModR/M for x87 opcode 0xd9", this);
5193  case 2:
5194  mr->set_type(FLOATT);
5195  return makeInstruction(x86_fst, "fst", modrm);
5196  case 3:
5197  mr->set_type(FLOATT);
5198  return makeInstruction(x86_fstp, "fstp", modrm);
5199  case 4:
5200  mr->set_type(BYTET);
5201  return makeInstruction(x86_fldenv, "fldenv", modrm);
5202  case 5:
5203  mr->set_type(WORDT);
5204  return makeInstruction(x86_fldcw, "fldcw", modrm);
5205  case 6:
5206  mr->set_type(BYTET);
5207  return makeInstruction(x86_fnstenv, "fnstenv", modrm);
5208  case 7:
5209  mr->set_type(WORDT);
5210  return makeInstruction(x86_fnstcw, "fnstcw", modrm);
5211  default:
5212  ROSE_ASSERT(false);
5213  }
5214  } else if (regField == 0 || regField == 1) { // FLD and FXCH on registers
5215  modrm = makeModrmNormal(rmST, NULL);
5216  switch (regField) {
5217  case 0: return makeInstruction(x86_fld, "fld", modrm);
5218  case 1: return makeInstruction(x86_fxch, "fxch", modrm);
5219  default: ROSE_ASSERT(false);
5220  }
5221  } else {
5222  switch (modregrmByte) {
5223  case 0xD0: return makeInstruction(x86_fnop, "fnop");
5224  case 0xE0: return makeInstruction(x86_fchs, "fchs");
5225  case 0xE1: return makeInstruction(x86_fabs, "fabs");
5226  case 0xE4: return makeInstruction(x86_ftst, "ftst");
5227  case 0xE5: return makeInstruction(x86_fxam, "fxam");
5228  case 0xE8: return makeInstruction(x86_fld1, "fld1");
5229  case 0xE9: return makeInstruction(x86_fldl2t, "fldl2t");
5230  case 0xEA: return makeInstruction(x86_fldl2e, "fldl2e");
5231  case 0xEB: return makeInstruction(x86_fldpi, "fldpi");
5232  case 0xEC: return makeInstruction(x86_fldlg2, "fldlg2");
5233  case 0xED: return makeInstruction(x86_fldln2, "fldln2");
5234  case 0xEE: return makeInstruction(x86_fldz, "fldz");
5235  case 0xF0: return makeInstruction(x86_f2xm1, "f2xm1");
5236  case 0xF1: return makeInstruction(x86_fyl2x, "fyl2x");
5237  case 0xF2: return makeInstruction(x86_fptan, "fptan");
5238  case 0xF3: return makeInstruction(x86_fpatan, "fpatan");
5239  case 0xF4: return makeInstruction(x86_fxtract, "fxtract");
5240  case 0xF5: return makeInstruction(x86_fprem1, "fprem1");
5241  case 0xF6: return makeInstruction(x86_fdecstp, "fdecstp");
5242  case 0xF7: return makeInstruction(x86_fincstp, "fincstp");
5243  case 0xF8: return makeInstruction(x86_fprem, "fprem");
5244  case 0xF9: return makeInstruction(x86_fyl2xp1, "fyl2xp1");
5245  case 0xFA: return makeInstruction(x86_fsqrt, "fsqrt");
5246  case 0xFB: return makeInstruction(x86_fsincos, "fsincos");
5247  case 0xFC: return makeInstruction(x86_frndint, "frndint");
5248  case 0xFD: return makeInstruction(x86_fscale, "fscale");
5249  case 0xFE: return makeInstruction(x86_fsin, "fsin");
5250  case 0xFF: return makeInstruction(x86_fcos, "fcos");
5251  default: throw ExceptionX86("bad ModR/M value for x87 opcode 0xd9", this);
5252  }
5253  }
5254  /* avoid MSCV warning by adding return stmt */
5255  return NULL;
5256 }
5257 
5258 SgAsmx86Instruction *
5259 DisassemblerX86::decodeX87InstructionDA()
5260 {
5261  getModRegRM(rmReturnNull, rmReturnNull, DWORDT);
5262  if (modeField < 3) {
5263  switch (regField) {
5264  case 0: return makeInstruction(x86_fiadd, "fiadd", modrm);
5265  case 1: return makeInstruction(x86_fimul, "fimul", modrm);
5266  case 2: return makeInstruction(x86_ficom, "ficom", modrm);
5267  case 3: return makeInstruction(x86_ficomp, "ficomp", modrm);
5268  case 4: return makeInstruction(x86_fisub, "fisub", modrm);
5269  case 5: return makeInstruction(x86_fisubr, "fisubr", modrm);
5270  case 6: return makeInstruction(x86_fidiv, "fidiv", modrm);
5271  case 7: return makeInstruction(x86_fidivr, "fidivr", modrm);
5272  default: ROSE_ASSERT(false);
5273  }
5274  } else if (regField < 4) { // FCMOV{B,E,BE,U}
5275  modrm = makeModrmRegister(rmST);
5276  switch (regField) {
5277  case 0: return makeInstruction(x86_fcmovb, "fcmovb", makeRegister(0, rmST), modrm);
5278  case 1: return makeInstruction(x86_fcmove, "fcmove", makeRegister(0, rmST), modrm);
5279  case 2: return makeInstruction(x86_fcmovbe, "fcmovbe", makeRegister(0, rmST), modrm);
5280  case 3: return makeInstruction(x86_fcmovu, "fcmovu", makeRegister(0, rmST), modrm);
5281  default: ROSE_ASSERT(false);
5282  }
5283  } else {
5284  switch (modregrmByte) {
5285  case 0xE9: return makeInstruction(x86_fucompp, "fucompp");
5286  default: throw ExceptionX86("bad ModR/M value for x87 opcode 0xda", this);
5287  }
5288  }
5289  /* avoid MSCV warning by adding return stmt */
5290  return NULL;
5291 }
5292 
5293 SgAsmx86Instruction *
5294 DisassemblerX86::decodeX87InstructionDB()
5295 {
5296  getModRegRM(rmReturnNull, rmReturnNull, NULL);
5297  if (modeField < 3) {
5298  SgAsmMemoryReferenceExpression* mr = isSgAsmMemoryReferenceExpression(modrm);
5299  ROSE_ASSERT(mr);
5300  if (regField <= 3) {
5301  mr->set_type(DWORDT);
5302  } else {
5303  mr->set_type(LDOUBLET);
5304  }
5305  switch (regField) {
5306  case 0: return makeInstruction(x86_fild, "fild", modrm);
5307  case 1: return makeInstruction(x86_fisttp, "fisttp", modrm);
5308  case 2: return makeInstruction(x86_fist, "fist", modrm);
5309  case 3: return makeInstruction(x86_fistp, "fistp", modrm);
5310  case 4: throw ExceptionX86("bad ModR/M value for x87 opcode 0xdb", this);
5311  case 5: return makeInstruction(x86_fld, "fld", modrm);
5312  case 6: throw ExceptionX86("bad ModR/M value for x87 opcode 0xdb", this);
5313  case 7: return makeInstruction(x86_fstp, "fstp", modrm);
5314  default: ROSE_ASSERT(false);
5315  }
5316  } else if (regField <= 3 || regField == 5 || regField == 6) { // FCMOV{NB,NE,NBE,NU}, FUCOMI, FCOMI
5317  modrm = makeModrmNormal(rmST, NULL);
5318  switch (regField) {
5319  case 0: return makeInstruction(x86_fcmovnb, "fcmovnb", makeRegister(0, rmST), modrm);
5320  case 1: return makeInstruction(x86_fcmovne, "fcmovne", makeRegister(0, rmST), modrm);
5321  case 2: return makeInstruction(x86_fcmovnbe, "fcmovnbe", makeRegister(0, rmST), modrm);
5322  case 3: return makeInstruction(x86_fcmovnu, "fcmovnu", makeRegister(0, rmST), modrm);
5323  case 5: return makeInstruction(x86_fucomi, "fucomi", makeRegister(0, rmST), modrm);
5324  case 6: return makeInstruction(x86_fcomi, "fcomi", makeRegister(0, rmST), modrm);
5325  default: ROSE_ASSERT(false);
5326  }
5327  } else {
5328  switch (modregrmByte) {
5329  case 0xE2: return makeInstruction(x86_fnclex, "fnclex");
5330  case 0xE3: return makeInstruction(x86_fninit, "fninit");
5331  default: throw ExceptionX86("bad ModR/M value for x87 opcode 0xdb", this);
5332  }
5333  }
5334  /* avoid MSCV warning by adding return stmt */
5335  return NULL;
5336 }
5337 
5338 SgAsmx86Instruction *
5339 DisassemblerX86::decodeX87InstructionDC()
5340 {
5341  getModRegRM(rmReturnNull, rmST, DOUBLET);
5342  if (modeField < 3) { // Using memory
5343  switch (regField & 7) {
5344  case 0: return makeInstruction(x86_fadd, "fadd", modrm);
5345  case 1: return makeInstruction(x86_fmul, "fmul", modrm);
5346  case 2: return makeInstruction(x86_fcom, "fcom", modrm);
5347  case 3: return makeInstruction(x86_fcomp, "fcomp", modrm);
5348  case 4: return makeInstruction(x86_fsub, "fsub", modrm);
5349  case 5: return makeInstruction(x86_fsubr, "fsubr", modrm);
5350  case 6: return makeInstruction(x86_fdiv, "fdiv", modrm);
5351  case 7: return makeInstruction(x86_fdivr, "fdivr", modrm);
5352  default: ROSE_ASSERT(false);
5353  }
5354  } else { // Two-operand register forms
5355  switch (regField & 7) {
5356  case 0: return makeInstruction(x86_fadd, "fadd", modrm, makeRegister(0, rmST));
5357  case 1: return makeInstruction(x86_fmul, "fmul", modrm, makeRegister(0, rmST));
5358  case 2: throw ExceptionX86("bad ModR/M value for x87 opcode 0xdc", this);
5359  case 3: throw ExceptionX86("bad ModR/M value for x87 opcode 0xdc", this);
5360  case 4: return makeInstruction(x86_fsubr, "fsubr", modrm, makeRegister(0, rmST));
5361  case 5: return makeInstruction(x86_fsub, "fsub", modrm, makeRegister(0, rmST));
5362  case 6: return makeInstruction(x86_fdivr, "fdivr", modrm, makeRegister(0, rmST));
5363  case 7: return makeInstruction(x86_fdiv, "fdiv", modrm, makeRegister(0, rmST));
5364  default: ROSE_ASSERT(false);
5365  }
5366  }
5367  /* avoid MSCV warning by adding return stmt */
5368  return NULL;
5369 }
5370 
5371 SgAsmx86Instruction *
5372 DisassemblerX86::decodeX87InstructionDD()
5373 {
5374  getModRegRM(rmReturnNull, rmST, NULL);
5375  if (modeField < 3) { // Using memory
5376  SgAsmMemoryReferenceExpression* mr = isSgAsmMemoryReferenceExpression(modrm);
5377  ROSE_ASSERT(mr);
5378  switch (regField) {
5379  case 0:
5380  mr->set_type(DOUBLET);
5381  return makeInstruction(x86_fld, "fld", modrm);
5382  case 1:
5383  mr->set_type(QWORDT);
5384  return makeInstruction(x86_fisttp, "fisttp", modrm);
5385  case 2:
5386  mr->set_type(DOUBLET);
5387  return makeInstruction(x86_fst, "fst", modrm);
5388  case 3:
5389  mr->set_type(DOUBLET);
5390  return makeInstruction(x86_fstp, "fstp", modrm);
5391  case 4:
5392  mr->set_type(BYTET);
5393  return makeInstruction(x86_frstor, "frstor", modrm);
5394  case 5:
5395  throw ExceptionX86("bad ModR/M value for x87 opcode 0xdd", this);
5396  case 6:
5397  mr->set_type(BYTET);
5398  return makeInstruction(x86_fnsave, "fnsave", modrm);
5399  case 7:
5400  mr->set_type(WORDT);
5401  return makeInstruction(x86_fnstsw, "fnstsw", modrm);
5402  default:
5403  ROSE_ASSERT(false);
5404  }
5405  } else { // Register forms
5406  switch (regField) {
5407  case 0: return makeInstruction(x86_ffree, "ffree", modrm);
5408  case 1: throw ExceptionX86("bad ModR/M value for x87 opcode 0xdd", this);
5409  case 2: return makeInstruction(x86_fst, "fst", modrm);
5410  case 3: return makeInstruction(x86_fstp, "fstp", modrm);
5411  case 4: return makeInstruction(x86_fucom, "fucom", modrm, makeRegister(0, rmST));
5412  case 5: return makeInstruction(x86_fucomp, "fucomp", modrm, makeRegister(0, rmST));
5413  case 6: throw ExceptionX86("bad ModR/M value for x87 opcode 0xdd", this);
5414  case 7: throw ExceptionX86("bad ModR/M value for x87 opcode 0xdd", this);
5415  default: ROSE_ASSERT(false);
5416  }
5417  }
5418  /* avoid MSCV warning by adding return stmt */
5419  return NULL;
5420 }
5421 
5422 SgAsmx86Instruction *
5423 DisassemblerX86::decodeX87InstructionDE()
5424 {
5425  getModRegRM(rmReturnNull, rmST, WORDT);
5426  if (modeField < 3) { // Using memory
5427  switch (regField & 7) {
5428  case 0: return makeInstruction(x86_fiadd, "fiadd", modrm);
5429  case 1: return makeInstruction(x86_fimul, "fimul", modrm);
5430  case 2: return makeInstruction(x86_ficom, "ficom", modrm);
5431  case 3: return makeInstruction(x86_ficomp, "ficomp", modrm);
5432  case 4: return makeInstruction(x86_fisub, "fisub", modrm);
5433  case 5: return makeInstruction(x86_fisubr, "fisubr", modrm);
5434  case 6: return makeInstruction(x86_fidiv, "fidiv", modrm);
5435  case 7: return makeInstruction(x86_fidivr, "fidivr", modrm);
5436  default: ROSE_ASSERT(false);
5437  }
5438  } else {
5439  switch (regField & 7) {
5440  case 0: return makeInstruction(x86_faddp, "faddp", modrm, makeRegister(0, rmST));
5441  case 1: return makeInstruction(x86_fmulp, "fmulp", modrm, makeRegister(0, rmST));
5442  case 2: throw ExceptionX86("bad ModR/M value for x87 opcode 0xde", this);
5443  case 3: {
5444  switch (modregrmByte) {
5445  case 0xD9: delete modrm; delete reg; return makeInstruction(x86_fcompp, "fcompp");
5446  default: throw ExceptionX86("bad ModR/M value for x87 opcode 0xde", this);
5447  }
5448  }
5449  case 4: return makeInstruction(x86_fsubrp, "fsubrp", modrm, makeRegister(0, rmST));
5450  case 5: return makeInstruction(x86_fsubp, "fsubp", modrm, makeRegister(0, rmST));
5451  case 6: return makeInstruction(x86_fdivrp, "fdivrp", modrm, makeRegister(0, rmST));
5452  case 7: return makeInstruction(x86_fdivp, "fdivp", modrm, makeRegister(0, rmST));
5453  default: ROSE_ASSERT(false);
5454  }
5455  }
5456  /* avoid MSCV warning by adding return stmt */
5457  return NULL;
5458 }
5459 
5460 SgAsmx86Instruction *
5461 DisassemblerX86::decodeX87InstructionDF()
5462 {
5463  getModRegRM(rmReturnNull, rmReturnNull, NULL);
5464  if (modeField < 3) { // Using memory
5465  SgAsmMemoryReferenceExpression* mr = isSgAsmMemoryReferenceExpression(modrm);
5466  ROSE_ASSERT(mr);
5467  switch (regField) {
5468  case 0: mr->set_type(WORDT); return makeInstruction(x86_fild, "fild", modrm);
5469  case 1: mr->set_type(WORDT); return makeInstruction(x86_fisttp, "fisttp", modrm);
5470  case 2: mr->set_type(WORDT); return makeInstruction(x86_fist, "fist", modrm);
5471  case 3: mr->set_type(WORDT); return makeInstruction(x86_fistp, "fistp", modrm);
5472  case 4: mr->set_type(BYTET); return makeInstruction(x86_fbld, "fbld", modrm);
5473  case 5: mr->set_type(QWORDT); return makeInstruction(x86_fild, "fild", modrm);
5474  case 6: mr->set_type(BYTET); return makeInstruction(x86_fbstp, "fbstp", modrm);
5475  case 7: mr->set_type(QWORDT); return makeInstruction(x86_fistp, "fistp", modrm);
5476  default: ROSE_ASSERT(false);
5477  }
5478  } else {
5479  modrm = makeModrmNormal(rmST, NULL);
5480  switch (regField) {
5481  case 0: throw ExceptionX86("bad ModR/M value for x87 opcode 0xdf", this);
5482  case 1: throw ExceptionX86("bad ModR/M value for x87 opcode 0xdf", this);
5483  case 2: throw ExceptionX86("bad ModR/M value for x87 opcode 0xdf", this);
5484  case 3: throw ExceptionX86("bad ModR/M value for x87 opcode 0xdf", this);
5485  case 4: {
5486  if (modregrmByte == 0xE0) {
5487  return makeInstruction(x86_fnstsw, "fnstsw", makeRegister(0, rmWord));
5488  } else {
5489  throw ExceptionX86("bad ModR/M value for x87 opcode 0xdf", this);
5490  }
5491  }
5492  case 5: return makeInstruction(x86_fucomip, "fucomip", makeRegister(0, rmST), modrm);
5493  case 6: return makeInstruction(x86_fcomip, "fcomip", makeRegister(0, rmST), modrm);
5494  case 7: throw ExceptionX86("bad ModR/M value for x87 opcode 0xdf", this);
5495  default: ROSE_ASSERT(false);
5496  }
5497  }
5498  /* avoid MSCV warning by adding return stmt */
5499  return NULL;
5500 }
5501 
5502 SgAsmx86Instruction *
5503 DisassemblerX86::decodeGroup1(SgAsmExpression* imm)
5504 {
5505  switch (regField) {
5506  case 0: return makeInstruction(x86_add, "add", modrm, imm);
5507  case 1: return makeInstruction(x86_or, "or", modrm, imm);
5508  case 2: return makeInstruction(x86_adc, "adc", modrm, imm);
5509  case 3: return makeInstruction(x86_sbb, "sbb", modrm, imm);
5510  case 4: return makeInstruction(x86_and, "and", modrm, imm);
5511  case 5: return makeInstruction(x86_sub, "sub", modrm, imm);
5512  case 6: return makeInstruction(x86_xor, "xor", modrm, imm);
5513  case 7: return makeInstruction(x86_cmp, "cmp", modrm, imm);
5514  default: ROSE_ASSERT(false);
5515  }
5516  /* avoid MSCV warning by adding return stmt */
5517  return NULL;
5518 }
5519 
5520 SgAsmx86Instruction *
5521 DisassemblerX86::decodeGroup1a()
5522 {
5523  if (regField != 0)
5524  throw ExceptionX86("bad ModR/M value for Group 1a opcode", this);
5525  return makeInstruction(x86_pop, "pop", modrm);
5526 }
5527 
5528 SgAsmx86Instruction *
5529 DisassemblerX86::decodeGroup2(SgAsmExpression* count)
5530 {
5531  switch (regField) {
5532  case 0: return makeInstruction(x86_rol, "rol", modrm, count);
5533  case 1: return makeInstruction(x86_ror, "ror", modrm, count);
5534  case 2: return makeInstruction(x86_rcl, "rcl", modrm, count);
5535  case 3: return makeInstruction(x86_rcr, "rcr", modrm, count);
5536  case 4: return makeInstruction(x86_shl, "shl", modrm, count);
5537  case 5: return makeInstruction(x86_shr, "shr", modrm, count);
5538  case 6: return makeInstruction(x86_shl, "shl", modrm, count);
5539  case 7: return makeInstruction(x86_sar, "sar", modrm, count);
5540  default: ROSE_ASSERT(false);
5541  }
5542  /* avoid MSCV warning by adding return stmt */
5543  return NULL;
5544 }
5545 
5546 SgAsmx86Instruction *
5547 DisassemblerX86::decodeGroup3(SgAsmExpression* immMaybe)
5548 {
5549  switch (regField) {
5550  case 0:
5551  case 1:
5552  ROSE_ASSERT(immMaybe);
5553  return makeInstruction(x86_test, "test", modrm, immMaybe);
5554  case 2:
5555  return makeInstruction(x86_not, "not", modrm);
5556  case 3:
5557  return makeInstruction(x86_neg, "neg", modrm);
5558  case 4:
5559  return makeInstruction(x86_mul, "mul", modrm);
5560  case 5:
5561  return makeInstruction(x86_imul, "imul", modrm);
5562  case 6:
5563  return makeInstruction(x86_div, "div", modrm);
5564  case 7:
5565  return makeInstruction(x86_idiv, "idiv", modrm);
5566  default:
5567  ROSE_ASSERT(false);
5568  }
5569  /* avoid MSCV warning by adding return stmt */
5570  return NULL;
5571 }
5572 
5573 SgAsmx86Instruction *
5574 DisassemblerX86::decodeGroup4()
5575 {
5576  switch (regField) {
5577  case 0: return makeInstruction(x86_inc, "inc", modrm);
5578  case 1: return makeInstruction(x86_dec, "dec", modrm);
5579  default: throw ExceptionX86("bad ModR/M value for Group 4 opcode", this);
5580  }
5581  /* avoid MSCV warning by adding return stmt */
5582  return NULL;
5583 }
5584 
5585 SgAsmx86Instruction *
5586 DisassemblerX86::decodeGroup5()
5587 {
5588  switch (regField) {
5589  case 0:
5590  return makeInstruction(x86_inc, "inc", modrm);
5591  case 1:
5592  return makeInstruction(x86_dec, "dec", modrm);
5593  case 2:
5594  return makeInstruction(x86_call, "call", modrm);
5595  case 3:
5596  return makeInstruction(x86_farcall, "farCall", modrm);
5597  case 4:
5598  isUnconditionalJump = true;
5599  return makeInstruction(x86_jmp, "jmp", modrm);
5600  case 5:
5601  isUnconditionalJump = true;
5602  return makeInstruction(x86_farjmp, "farJmp", modrm);
5603  case 6:
5604  return makeInstruction(x86_push, "push", modrm);
5605  case 7:
5606  throw ExceptionX86("bad ModR/M value for Group 5 opcode", this);
5607  default:
5608  ROSE_ASSERT(false);
5609  }
5610  /* avoid MSCV warning by adding return stmt */
5611  return NULL;
5612 }
5613 
5614 SgAsmx86Instruction *
5615 DisassemblerX86::decodeGroup6()
5616 {
5617  switch (regField) {
5618  case 0: return makeInstruction(x86_sldt, "sldt", modrm); // FIXME adjust register size
5619  case 1: return makeInstruction(x86_str, "str", modrm); // FIXME adjust register size
5620  case 2: return makeInstruction(x86_lldt, "lldt", modrm);
5621  case 3: return makeInstruction(x86_ltr, "ltr", modrm);
5622  case 4: return makeInstruction(x86_verr, "verr", modrm);
5623  case 5: return makeInstruction(x86_verw, "verw", modrm);
5624  case 6: throw ExceptionX86("bad ModR/M value for Group 6 opcode", this);
5625  case 7: throw ExceptionX86("bad ModR/M value for Group 6 opcode", this);
5626  default: ROSE_ASSERT(false);
5627  }
5628  /* avoid MSCV warning by adding return stmt */
5629  return NULL;
5630 }
5631 
5632 SgAsmx86Instruction *
5633 DisassemblerX86::decodeGroup7()
5634 {
5635  getModRegRM(rmReturnNull, rmReturnNull, NULL);
5636  switch (regField) {
5637  case 0: {
5638  if (modeField == 3) {
5639  switch (rmField) {
5640  case 1: return makeInstruction(x86_vmcall, "vmcall");
5641  case 2: return makeInstruction(x86_vmlaunch, "vmlaunch");
5642  case 3: return makeInstruction(x86_vmresume, "vmresume");
5643  case 4: return makeInstruction(x86_vmxoff, "vmxoff");
5644  default: throw ExceptionX86("bad ModR/M value for Group 7 opcode", this);
5645  }
5646  } else {
5647  fillInModRM(rmReturnNull, BYTET /* pseudo-descriptor */ );
5648  return makeInstruction(x86_sgdt, "sgdt", modrm);
5649  }
5650  }
5651  case 1: {
5652  if (modeField == 3) {
5653  switch (rmField) {
5654  case 0: return makeInstruction(x86_monitor, "monitor");
5655  case 1: return makeInstruction(x86_mwait, "mwait");
5656  default: throw ExceptionX86("bad ModR/M value for Group 7 opcode", this);
5657  }
5658  } else {
5659  fillInModRM(rmReturnNull, BYTET /* pseudo-descriptor */ );
5660  return makeInstruction(x86_sidt, "sidt", modrm);
5661  }
5662  }
5663  case 2: {
5664  if (modeField ==3) {
5665  switch (rmField) {
5666  case 0: return makeInstruction(x86_xgetbv, "xgetbv");
5667  case 1: return makeInstruction(x86_xsetbv, "xsetbv");
5668  default: throw ExceptionX86("bad ModR/M value for Group 7 opcode", this);
5669  }
5670  } else {
5671  fillInModRM(rmReturnNull, BYTET /* pseudo-descriptor */ );
5672  return makeInstruction(x86_lgdt, "lgdt", modrm);
5673  }
5674  }
5675  case 3: {
5676  if (modeField == 3) {
5677  switch (rmField) {
5678  case 0: return makeInstruction(x86_vmrun, "vmrun");
5679  case 1: return makeInstruction(x86_vmmcall, "vmmcall");
5680  case 2: return makeInstruction(x86_vmload, "vmload");
5681  case 3: return makeInstruction(x86_vmsave, "vmsave");
5682  case 4: return makeInstruction(x86_stgi, "stgi");
5683  case 5: return makeInstruction(x86_clgi, "clgi");
5684  case 6: return makeInstruction(x86_skinit, "skinit");
5685  case 7: return makeInstruction(x86_invlpga, "invlpga");
5686  default: ROSE_ASSERT(false);
5687  }
5688  } else {
5689  fillInModRM(rmReturnNull, BYTET /* pseudo-descriptor */ );
5690  return makeInstruction(x86_lidt, "lidt", modrm);
5691  }
5692  }
5693  case 4: {
5694  fillInModRM(effectiveOperandMode(), WORDT);
5695  return makeInstruction(x86_smsw, "smsw", modrm);
5696  }
5697  case 5:
5698  throw ExceptionX86("bad ModR/M value for Group 7 opcode", this);
5699  case 6: {
5700  fillInModRM(rmWord, WORDT);
5701  return makeInstruction(x86_lmsw, "lmsw", modrm);
5702  }
5703  case 7: {
5704  if (modeField == 3) {
5705  switch (rmField) {
5706  case 0: return makeInstruction(x86_swapgs, "swapgs");
5707  case 1: return makeInstruction(x86_rdtscp, "rdtscp");
5708  default: throw ExceptionX86("bad ModR/M value for Group 7 opcode", this);
5709  }
5710  } else {
5711  fillInModRM(rmReturnNull, BYTET);
5712  return makeInstruction(x86_invlpg, "invlpg", modrm);
5713  }
5714  }
5715  default:
5716  ROSE_ASSERT(false);
5717  }
5718  /* avoid MSCV warning by adding return stmt */
5719  return NULL;
5720 }
5721 
5722 SgAsmx86Instruction *
5723 DisassemblerX86::decodeGroup8(SgAsmExpression* imm)
5724 {
5725  switch (regField) {
5726  case 0: throw ExceptionX86("bad ModR/M value for Group 8 opcode", this);
5727  case 1: throw ExceptionX86("bad ModR/M value for Group 8 opcode", this);
5728  case 2: throw ExceptionX86("bad ModR/M value for Group 8 opcode", this);
5729  case 3: throw ExceptionX86("bad ModR/M value for Group 8 opcode", this);
5730  case 4: return makeInstruction(x86_bt, "bt", modrm, imm);
5731  case 5: return makeInstruction(x86_bts, "bts", modrm, imm);
5732  case 6: return makeInstruction(x86_btr, "btr", modrm, imm);
5733  case 7: return makeInstruction(x86_btc, "btc", modrm, imm);
5734  default: ROSE_ASSERT(false);
5735  }
5736  /* avoid MSCV warning by adding return stmt */
5737  return NULL;
5738 }
5739 
5740 SgAsmx86Instruction *
5741 DisassemblerX86::decodeGroup11(SgAsmExpression* imm)
5742 {
5743  switch (regField) {
5744  case 0: return makeInstruction(x86_mov, "mov", modrm, imm);
5745  default: throw ExceptionX86("bad ModR/M value for Group 11 opcode", this);
5746  }
5747  /* avoid MSCV warning by adding return stmt */
5748  return NULL;
5749 }
5750 
5751 SgAsmx86Instruction *
5752 DisassemblerX86::decodeGroup15()
5753 {
5754  getModRegRM(rmReturnNull, rmReturnNull, NULL);
5755  switch (regField) {
5756  case 0:
5757  requireMemory();
5758  fillInModRM(rmReturnNull, BYTET);
5759  return makeInstruction(x86_fxsave, "fxsave", modrm);
5760  case 1:
5761  requireMemory();
5762  fillInModRM(rmReturnNull, BYTET);
5763  return makeInstruction(x86_fxrstor, "fxrstor", modrm);
5764  case 2:
5765  requireMemory();
5766  fillInModRM(rmReturnNull, DWORDT);
5767  return makeInstruction(x86_ldmxcsr, "ldmxcsr", modrm);
5768  case 3:
5769  requireMemory();
5770  fillInModRM(rmReturnNull, DWORDT);
5771  return makeInstruction(x86_stmxcsr, "stmxcsr", modrm);
5772  case 4:
5773  requireMemory();
5774  fillInModRM(rmReturnNull, BYTET);
5775  return makeInstruction(x86_xsave, "xsave", modrm);
5776  case 5:
5777  if (modeField == 3) {
5778  return makeInstruction(x86_lfence, "lfence");
5779  } else {
5780  return makeInstruction(x86_xrstor, "xrstor", modrm);
5781  }
5782  case 6:
5783  if (modeField == 3) {
5784  return makeInstruction(x86_mfence, "mfence");
5785  } else {
5786  throw ExceptionX86("bad ModR/M value for Group 15 opcode", this);
5787  }
5788  case 7:
5789  if (modeField == 3) {
5790  return makeInstruction(x86_sfence, "sfence");
5791  } else {
5792  return makeInstruction(x86_clflush, "clflush", modrm);
5793  }
5794  default:
5795  ROSE_ASSERT(false);
5796  }
5797  /* avoid MSCV warning by adding return stmt */
5798  return NULL;
5799 }
5800 
5801 SgAsmx86Instruction *
5802 DisassemblerX86::decodeGroup16()
5803 {
5804  requireMemory();
5805  switch (regField) {
5806  case 0: return makeInstruction(x86_prefetchnta, "prefetchnta", modrm);
5807  case 1: return makeInstruction(x86_prefetcht0, "prefetcht0", modrm);
5808  case 2: return makeInstruction(x86_prefetcht1, "prefetcht1", modrm);
5809  case 3: return makeInstruction(x86_prefetcht2, "prefetcht2", modrm);
5810  default: return makeInstruction(x86_prefetch, "prefetch", modrm);
5811  }
5812 }
5813 
5814 SgAsmx86Instruction *
5815 DisassemblerX86::decodeGroupP()
5816 {
5817  getModRegRM(rmReturnNull, rmLegacyByte, BYTET);
5818  requireMemory();
5819  switch (regField) {
5820  case 0: return makeInstruction(x86_prefetch, "prefetch", modrm);
5821  case 1: return makeInstruction(x86_prefetchw, "prefetchw", modrm);
5822  case 3: return makeInstruction(x86_prefetchw, "prefetchw", modrm);
5823  default: return makeInstruction(x86_prefetch, "prefetch", modrm);
5824  }
5825 }